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US Patent 11835991 Self-test controller, and associated method
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Patent
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Date Filed
March 22, 2021
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Date of Patent
December 5, 2023
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Patent Application Number
17208935
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Patent Citations
US Patent 7360134 Centralized BIST engine for testing on-chip memory structures
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US Patent 7716546 System and method for improved LBIST power and run time
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US Patent 7761763 System-on-chip (SOC) having built-in-self-test circuits and a self-test method of the SOC
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US Patent 7831877 Circuitry to prevent peak power problems during scan shift
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US Patent 7945823 Programmable address space built-in self test (BIST) device and method for fault detection
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US Patent 7996743 Logic circuit testing with reduced overhead
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US Patent 8694276 Built-in self-test methods, circuits and apparatus for concurrent test of RF modules with a dynamically configurable test structure
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US Patent 8935586 Staggered start of BIST controllers and BIST engines
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US Patent 9196381 Technique to operate memory in functional mode under LBIST test
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US Patent 9823296 Built-in self test system, system on a chip and method for controlling built-in self tests
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•••
Patent Inventor Names
Balwinder Singh Soni
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Amulya Pandey
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Amritanshu Anand
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Venkata Narayanan Srinivasan
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Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
11835991
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Patent Primary Examiner
Kamini B Patel
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CPC Code
G06F 1/3296
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G06F 1/08
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G06F 11/27
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G06F 11/26
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G06F 1/324
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