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US Patent 11837581 Semiconductor package
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Patent
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Date Filed
November 9, 2022
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Date of Patent
December 5, 2023
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Patent Application Number
17983487
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Patent Citations
US Patent 8008764 Bridges for interconnecting interposers in multi-chip integrated circuits
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US Patent 8685792 Integrated circuit package system with interposer
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US Patent 8704364 Reducing stress in multi-die integrated circuit structures
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US Patent 9991226 Semiconductor packages having asymmetric chip stack structure
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US Patent 9780042 Tunable composite interposer
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US Patent 10475770 Semiconductor device having stacked dies and stacked pillars and method of manufacturing thereof
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US Patent 6977348 High density laminated substrate structure and manufacture method thereof
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US Patent 7176561 Semiconductor device, method for manufacturing the same, circuit board, and electronic equipment
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Patent Inventor Names
Moonseob Jeong
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Yunhyeok Im
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Heeseok Lee
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Youngsang Cho
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Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
11837581
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Patent Primary Examiner
Jasmine J Clark
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CPC Code
H01L 23/3135
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H01L 23/49811
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H01L 25/0657
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H01L 23/3128
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H01L 23/5385
0
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