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US Patent 11876047 Decoupled interconnect structures

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
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Date Filed
September 14, 2021
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Date of Patent
January 16, 2024
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Patent Application Number
17447586
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Patent Citations
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US Patent 8841214 Dual damascene process
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US Patent 9171778 Dual-damascene process to fabricate thick wire structure
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US Patent 9171801 E-fuse with hybrid metallization
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US Patent 9418933 Through-substrate via formation with improved topography control
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US Patent 9721891 Integrated circuit devices and methods
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US Patent 9793163 Subtractive self-aligned via and plug patterning for back end of line (BEOL) interconnects
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US Patent 9793212 Interconnect structures and methods of forming same
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US Patent 10319629 Skip via for metal interconnects
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US Patent 11024577 Embedded anti-fuses for small scale applications
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US Patent 11018090 Selective CVD alignment-mark topography assist for non-volatile memory
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•••
Patent Inventor Names
Ashim Dutta
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Chih-Chao Yang
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Tianji Zhou
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Saumya Sharma
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
11876047
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Patent Primary Examiner
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Laura M Menz
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CPC Code
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H01L 21/76879
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H01L 21/76816
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H01L 23/528
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