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US Patent 11916013 Via interconnects including super vias

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Patent attributes

Patent Jurisdiction

United States Patent and Trademark Office

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Patent Number

Patent Inventor Names

Christopher J. Waskiewicz0

Eric Miller0

Chanro Park0

Yann Mignot0

Date of Patent

February 27, 2024

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Patent Application Number

174658150

Date Filed

September 2, 2021

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Patent Citations

US Patent 9385078 Self aligned via in integrated circuit

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US Patent 9805972 Skip via structures

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US Patent 10020254 Integration of super via structure in BEOL

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US Patent 10896874 Interconnects separated by a dielectric region formed using removable sacrificial plugs

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US Patent 10354912 Forming self-aligned vertical interconnect accesses (VIAs) in interconnect structures for integrated circuits (ICs)

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US Patent 10978388 Skip via for metal interconnects

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US Patent 7256502 Metal interconnections for semiconductor devices including a buffer layer on a trench sidewall

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US Patent 9059257 Self-aligned vias formed using sacrificial metal caps

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Patent Primary Examiner

Thanhha S. Pham

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CPC Code

0

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Patent abstract

Interconnect structures including super vias are formed during back-end-of-line processing using sacrificial placeholders to protect the bottom portions of the super vias while upper portions of the super vias are formed. The sacrificial placeholders are removed and replaced by metal conductors that fill the bottom and upper portions of the super vias.

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