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US Patent 11916054 Stacked devices and methods of fabrication
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Patent
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Date Filed
January 27, 2022
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Date of Patent
February 27, 2024
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Patent Application Number
17586236
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Patent Citations
US Patent 10910344 Systems and methods for releveled bump planes for chiplets
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US Patent 11393779 Large metal pads over TSV
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US Patent 11462419 Microelectronic assemblies
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US Patent 11476213 Bonded structures without intervening adhesive
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US Patent 11652083 Processed stacked dies
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US Patent 11658173 Stacked dies and methods for forming bonded structures
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US Patent 6887769 Dielectric recess for wafer-to-wafer and die-to-die metal bonding and method of fabricating the same
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US Patent 6908832 In situ plasma wafer bonding method
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US Patent 6962835 Method for room temperature metal direct bonding
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US Patent 7045453 Very low effective dielectric constant interconnect structures and methods for fabricating the same
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•••
Patent Inventor Names
Belgacem Haba
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Paul M. Enquist
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Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
11916054
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Patent Primary Examiner
Scott B. Geyer
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