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US Patent 11948940 Multi-gate device structure
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Patent
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Date Filed
July 20, 2022
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Date of Patent
April 2, 2024
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Patent Application Number
17869069
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Patent Citations
US Patent 9899398 Non-volatile memory device having nanocrystal floating gate and method of fabricating same
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US Patent 9947804 Methods of forming nanosheet transistor with dielectric isolation of source-drain regions and related structure
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US Patent 10032627 Method for forming stacked nanowire transistors
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US Patent 10109721 Horizontal gate-all-around device having wrapped-around source and drain
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US Patent 10157799 Multi-gate device and method of fabrication thereof
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US Patent 10199502 Structure of S/D contact and method of making same
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US Patent 10475902 Spacers for nanowire-based integrated circuit device and method of fabricating same
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US Patent 10290546 Threshold voltage adjustment for a gate-all-around semiconductor structure
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US Patent 11437373 Multi-gate device structure
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US Patent 9818872 Multi-gate device and method of fabrication thereof
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•••
Patent Inventor Names
Jhon Jhy Liaw
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Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
11948940
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Patent Primary Examiner
Tong-Ho Kim
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CPC Code
H01L 29/78696
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H01L 27/088
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H01L 29/1033
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H01L 29/41725
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H01L 29/42356
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H01L 29/7831
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H01L 29/785
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H01L 21/823864
0
H01L 21/823807
0
H01L 21/823814
0
•••
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