Is a
Patent attributes
Patent Jurisdiction
Patent Number
Patent Inventor Names
Yee-Chia Yeo0
Chii-Horng Li0
Chia-Ao Chang0
Pei-Ren Jeng0
Date of Patent
September 10, 2024
0Patent Application Number
172365350
Date Filed
April 21, 2021
0Patent Citations
0
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Patent Primary Examiner
CPC Code
Patent abstract
A system and methods of manufacturing semiconductor devices is described herein. The method includes forming a recess between fins in a substrate and forming a dielectric layer over the fins and in the recess. Once the dielectric layer has been formed, a bottom seed structure is formed over the dielectric layer within the recess and the dielectric layer is exposed along sidewalls of the recess. A dummy gate material is grown from the bottom seed structure in a bottom-up deposition process without growing the dummy gate material from the dielectric layer exposed along sidewalls of the recess.
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