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US Patent 12108588 Memory and method for manufacturing same

Patent 12108588 was granted and assigned to ChangXin Memory Technologies on October, 2024 by the United States Patent and Trademark Office.

Overview Structured Data Issues Contributors Activity

Is a

Patent

Current Assignee

ChangXin Memory Technologies

Date Filed

September 20, 2021

Date of Patent

October 1, 2024

Patent Applicant

ChangXin Memory Technologies

Patent Application Number

17479201

Patent Citations

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US Patent 7298638 Operating an electronic device having a vertical gain cell that includes vertical MOS transistors

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US Patent 7323380 Single transistor vertical memory gain cell

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US Patent 7525146 Nonvolatile semiconductor memory devices

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US Patent 7528440 Vertical gain cell

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US Patent 7790529 Methods of forming memory arrays and semiconductor constructions

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US Patent 7906397 Methods of fabricating nonvolatile semiconductor memory devices including a plurality of stripes having impurity layers therein

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US Patent 7977707 Capacitorless DRAM having a hole reserving unit

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US Patent 8013376 Memory arrays, semiconductor constructions and electronic systems with transistor gates extending partially over SOI and unit cells within active region pedestals

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US Patent 8084316 Method of fabricating single transistor floating-body DRAM devices having vertical channel transistor structures

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US Patent 8344436 Semiconductor constructions and electronic systems

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Patent Inventor Names

Kui Zhang

Patent Jurisdiction

United States Patent and Trademark Office

Patent Number

12108588

Patent Primary Examiner

CPC Code

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