US Patent 12113054 Non-volatile dynamic random access memory

The present disclosure provides for a stacked memory combining RAM and one or more layers of NVM, such as NAND. For example, a first layer of RAM, such as DRAM, is coupled to multiple consecutive layers of NAND using direct bonding interconnect (DBI®). Serialization and overhead that exists in periphery of the NVM may be stripped to manage the data stored therein. The resulting connections between the RAM and the NVM are high bandwidth, high pincount interconnects. Interconnects between each of the one or more layers of NVM are also very dense.