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US Patent 12127489 Integrated circuit structure

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
0
Date Filed
February 17, 2023
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Date of Patent
October 22, 2024
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Patent Application Number
18170947
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Patent Citations
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US Patent 9502466 Dummy bottom electrode in interconnect to reduce CMP dishing
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US Patent 9553019 Airgap protection layer for via alignment
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US Patent 9553265 RRAM device with data storage layer having increased height
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US Patent 9634243 Semiconductor structure and method of forming the same
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US Patent 9853091 Side bottom contact RRAM structure
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US Patent 10121875 Replacement gate structures for advanced integrated circuit structure fabrication
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US Patent 9859335 Semiconductor device having memory cell structure
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US Patent 10186308 Magnetic random access memory having improved reliability through thermal cladding
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US Patent 9236392 Multiheight electrically conductive via contacts for a multilevel interconnect structure
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US Patent 9312482 Resistance variable memory structure and method of forming the same
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Patent Inventor Names
Chung-Te Lin
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Jyu-Horng Shieh
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Pin-Ren Dai
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Han-Ting Tsai
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Hui-Hsien Wei
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Wei-Chih Wen
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Chien-Min Lee
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Tai-Yen Peng
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
12127489
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Patent Primary Examiner
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Michael T. Tran
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CPC Code
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H01L 45/1616
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H01L 45/1675
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H01L 27/2472
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H01L 27/2481
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H01L 43/02
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H01L 45/1266
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H01L 45/1233
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H01L 45/085
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H01L 27/2436
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H01L 27/228
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