Is a
Patent attributes
Current Assignee
Patent Jurisdiction
Patent Number
Date of Patent
April 29, 2008
0Patent Application Number
107698350
Date Filed
February 2, 2004
0Patent Primary Examiner
Patent abstract
A method of manufacturing an integrated circuit (IC) can utilize a shallow trench isolation (STI) technique. The shallow trench isolation technique can be used in an IC process. Separate liners for the trench are used for NMOS and PMOS regions. The liners can induce strain in the substrate.
Timeline
No Timeline data yet.
Further Resources
No Further Resources data yet.
