Is a
Patent attributes
Current Assignee
Patent Jurisdiction
Patent Number
Date of Patent
November 11, 2008
Patent Application Number
11432135
Date Filed
May 11, 2006
Patent Citations Received
Patent Primary Examiner
Patent abstract
Non-volatile memory devices utilizing a modified NAND architecture where ends of the NAND string of memory cells are selectively coupled to different bit lines may facilitate increased memory densities, reduced fabrication steps and faster read operations when compared to traditional NAND memory array architectures. Programming and erasing of the memory cells can be accomplished in the same manner as a traditional NAND memory array. However, reading of the memory cells may be accomplished using charge sharing techniques similar to read operations in a DRAM device.
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