US Patent 7553756 Process for producing semiconductor integrated circuit device
Patent 7553756 was granted and assigned to Hitachi on June, 2009 by the United States Patent and Trademark Office.
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An object of the present invention is to prevent formation of a badly situated via metal in a Damascene wiring portion in multiple layers having an air-gap structure. In the present invention, a via is completely separated from an air-gap 45 by forming an interlayer insulating film 44 having the air-gap 45 between adjacent Damascene wiring portions after forming a sacrifice film pillar 42 from a selectively removable insulating film in a formation region of a connection hole. The present invention can provide multiple-layered buried wiring in which a high reliable via connection and a reduced parasitic capacitance due to the air-gap are achieved.
US Patent 07553756 Process for producing semiconductor integrated circuit device US Patent 7553756 Process for producing semiconductor integrated circuit device
US Patent 07553756 Process for producing semiconductor integrated circuit device
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