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US Patent 7683428 Vertical Fin-FET MOS devices

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
0
Date Filed
January 22, 2004
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Date of Patent
March 23, 2010
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Patent Application Number
10597288
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Patent Citations Received
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US Patent 12132047 Semiconductor device and method for manufacturing semiconductor device
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US Patent 11876124 Vertical transistor having an oxygen-blocking layer
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US Patent 11894303 Circuit wiring techniques for stacked transistor structures
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US Patent 11894433 Method and structure to improve stacked FET bottom EPI contact
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US Patent 11908907 VFET contact formation
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US Patent 11949011 Vertical transistor with gate encapsulation layers
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US Patent 11978796 Contact and isolation in monolithically stacked VTFET
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US Patent 11764259 Vertical field-effect transistor with dielectric fin extension
Patent Inventor Names
Dureseti Chidambarrao
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Jochen Beintner
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Ramachandra Divakaruni
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
7683428
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Patent Primary Examiner
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Davienne Monbleau
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