US Patent 7882456 Optical lithography correction process

Patent 7882456 was granted and assigned to Cadence Design Systems on February, 2011 by the United States Patent and Trademark Office.

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Patent

Patent attributes

Current Assignee

Cadence Design Systems

Patent Jurisdiction

United States Patent and Trademark Office

Patent Number

7882456

Date of Patent

February 1, 2011

Patent Application Number

11101872

Date Filed

April 9, 2005

Patent Primary Examiner

‌

Sun J Lin

Patent abstract

A apparatus and method for correcting a process critical layout includes characterizing the influence of individual ones of a set of worst case process variations on a simulated nano-circuit layout design and then correcting layout geometries in the simulated nano-circuit layout based on such characterizations.

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