US Patent 7882456 Optical lithography correction process
Patent 7882456 was granted and assigned to Cadence Design Systems on February, 2011 by the United States Patent and Trademark Office.
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Patent abstract
A apparatus and method for correcting a process critical layout includes characterizing the influence of individual ones of a set of worst case process variations on a simulated nano-circuit layout design and then correcting layout geometries in the simulated nano-circuit layout based on such characterizations.
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US Patent 07882456 Optical lithography correction process US Patent 7882456 Optical lithography correction process
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Patent Number
0788245600
Patent Number
788245600
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Official Website
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Infobox
Is a
Current Assignee
Patent Jurisdiction
Patent Number
078824560
Date of Patent
February 1, 2011
0Patent Application Number
111018720
Date Filed
April 9, 2005
0Official Website
Patent Primary Examiner
Edits on 25 Sep, 2022
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Infobox
Is a
Current Assignee
Patent Jurisdiction
Patent Number
078824560
Date of Patent
February 1, 2011
0Patent Application Number
111018720
Date Filed
April 9, 2005
0Official Website
Patent Primary Examiner
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US Patent 07882456 Optical lithography correction process
Infobox
Is a
Current assignee
Patent jurisdiction
Patent number
07882456
Date of patent
February 1, 2011
Patent application number
11101872
Date Filed
April 9, 2005
Patent primary examiner
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