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US Patent 8241961 Method for manufacturing hetero-bonded wafer
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Patent
Date Filed
June 9, 2010
Date of Patent
August 14, 2012
Patent Application Number
12796798
Patent Citations Received
US Patent 12136605 Layer structures for making direct metal-to-metal bonds at low temperatures in microelectronics and method for forming the same
0
US Patent 12068278 Processed stacked dies
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US Patent 12080672 Direct gang bonding methods including directly bonding first element to second element to form bonded structure without adhesive
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US Patent 12113056 Stacked dies and methods for forming bonded structures
0
US Patent 12125784 Interconnect structures
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US Patent 12132020 Low temperature bonded structures
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US Patent 11710718 Structures and methods for low temperature bonding using nanoparticles
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US Patent 11715730 Direct-bonded LED arrays including optical elements configured to transmit optical signals from LED elements
0
US Patent 11749645 TSV as pad
US Patent 11756880 Interconnect structures
•••
Patent Inventor Names
Sang Hwan Lee
0
Young Hae Kim
0
Patent Jurisdiction
United States Patent and Trademark Office
Patent Number
8241961
Patent Primary Examiner
George Fourson, III
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