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US Patent 8698205 Integrated circuit layout having mixed track standard cell

Patent 8698205 was granted and assigned to Taiwan Semiconductor Manufacturing Company on April, 2014 by the United States Patent and Trademark Office.

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
Current Assignee
Taiwan Semiconductor Manufacturing Company
Taiwan Semiconductor Manufacturing Company
Date Filed
May 25, 2012
Date of Patent
April 15, 2014
Patent Application Number
13481270
Patent Citations Received
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US Patent 12089390 Cell manufacturing
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US Patent 11978732 Methods of manufacturing semiconductor devices
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US Patent 11990511 Source/drain device and method of forming thereof
0
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US Patent 11675954 Method of designing a device
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US Patent 11714946 Standard cell and semiconductor device including anchor nodes and method of making
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US Patent 11714947 Method and layout of an integrated circuit
0
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US Patent 11764202 Read-only memory circuit
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US Patent 11776950 Integrated circuit including cells with different heights and method of designing the same
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US Patent 11792969 Preventing gate-to-contact bridging by reducing contact dimensions in FinFET SRAM
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US Patent 11804487 Source/drain regions of semiconductor devices and methods of forming the same
•••
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
8698205
Patent Primary Examiner
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David S. Blum

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