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US Patent 8742509 Apparatus and method for FinFETs

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Patent Citations Received

US Patent 12132111 Formation method of semiconductor device structure with gate stacks

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US Patent 11855151 Multi-gate device and method of fabrication thereof

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Article

Patent abstract

A FinFET comprises an isolation region formed in a substrate, a cloak-shaped active region formed over the substrate, wherein the cloak-shaped active region has an upper portion protruding above a top surface of the isolation region. In addition, the FinFET comprises a gate electrode wrapping the channel of the cloak-shaped active region.

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Patent Inventor Names

Cheng-Hsien Wu0

Cheng-Tien Wan0

Chih-Hsin Ko0

Yi-Jing Lee0

You-Ru Lin0

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US Patent 11749720 Integrated circuit structure and method with solid phase diffusion

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US Patent 11749682 Selective dual silicide formation using a maskless fabrication process flow

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US Patent 11699758 Isolation structure having different distances to adjacent FinFET devices

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US Patent 08742509 Apparatus and method for FinFETs US Patent 8742509 Apparatus and method for FinFETs

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Patent Number

08742509

Patent Number

8742509

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Official Website

https://pdfpiw.uspto.gov/.piw?Docid=08742509

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Website URL

https://pdfpiw.uspto.gov/.piw?Docid=08742509

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US Patent 08742509 Apparatus and method for FinFETs

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Is a

Patent jurisdiction

United States Patent and Trademark Office

Patent number

08742509

Date of patent

June 3, 2014

Patent application number

13410073

Date Filed

March 1, 2012

Patent primary examiner

Fernando L Toledo

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