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US Patent 8759964 Wafer level package structure and fabrication methods

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
0
Date Filed
July 17, 2007
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Date of Patent
June 24, 2014
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Patent Application Number
11779192
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Patent Citations Received
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US Patent 12131984 Heterogeneous fan-out structure and method of manufacture
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US Patent 12119235 Methods of manufacture of semiconductor devices having redistribution layer using dielectric material having photoactive component
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US Patent 12119320 Chip package structure with bump
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US Patent 12125797 Package structure with fan-out feature
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US Patent 12125820 Through-dielectric vias for direct connection and method forming same
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US Patent 12132004 Semiconductor devices and methods of manufacture
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US Patent 11658085 Integrated circuit package and method
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US Patent 11670519 Redistribution structures for semiconductor packages and methods of forming the same
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US Patent 11670601 Stacking via structures for stress reduction
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US Patent 11682626 Chamfered die of semiconductor package and method for forming the same
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•••
Patent Inventor Names
Mirng-Ji Lii
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Han-Ping Pu
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
8759964
0
Patent Primary Examiner
Thao X Le
Thao X Le
0

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