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US Patent 8791575 Microelectronic elements having metallic pads overlying vias

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
Date Filed
July 23, 2010
Date of Patent
July 29, 2014
Patent Application Number
12842717
Patent Citations Received
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US Patent 12113056 Stacked dies and methods for forming bonded structures
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US Patent RE49987 Multiple plated via arrays of different wire heights on a same substrate
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US Patent 11764177 Bonded structure with interconnect structure
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US Patent 11855064 Techniques for processing devices
0
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US Patent 11935907 Image sensor device
0
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US Patent 11955463 Direct bonded stack structures for increased reliability and improved yield in microelectronics
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US Patent 11990382 Fine pitch BVA using reconstituted wafer with area array accessible for testing
0
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
8791575
Patent Primary Examiner
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Matthew Reames

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