US Patent 9036482 Bufferless nonblocking networks on chip
Patent 9036482 was granted and assigned to The Hong Kong University of Science and Technology on May, 2015 by the United States Patent and Trademark Office.
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Network on Chips (NoC)s with a bufferless and nonblocking architecture are described. Core processors are communicatively coupled together on a substrate with a set of routing nodes based on nonblocking process. A network component routes data packets through the routing nodes and the core processors via communication links. A bufferless cross bar switch facilitates the communication of the data packets and/or path setup packets through the communication links among source processors and destination processors. The communication links include one or more channels, in which a channel comprises a data sub-channel, an acknowledgement sub-channel and a release sub-channel.
US Patent 09036482 Bufferless nonblocking networks on chip US Patent 9036482 Bufferless nonblocking networks on chip
US Patent 09036482 Bufferless nonblocking networks on chip
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