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US Patent 9214555 Barrier layer for FinFET channels
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Patent
Date Filed
March 12, 2013
Date of Patent
December 15, 2015
Patent Application Number
13795786
Patent Citations Received
US Patent 12136600 Grounded metal ring structure for through-silicon via
0
US Patent 12132050 Semiconductor structure cutting process and structures formed thereby
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US Patent 12132091 Work function layers for transistor gate electrodes
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US Patent 12132100 Profile control in forming epitaxy regions for transistors
0
US Patent 11705372 Fin loss prevention
0
US Patent 11710779 Semiconductor device including interface layer and method of fabricating thereof
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US Patent 11715738 Semiconductor device and manufacturing method thereof
0
US Patent 11749570 Etch monitoring and performing
US Patent 11749683 Isolation structure for preventing unintentional merging of epitaxially grown source/drain
US Patent 11749738 Semiconductor device and manufacturing method thereof
•••
Patent Jurisdiction
United States Patent and Trademark Office
Patent Number
9214555
Patent Primary Examiner
Eduardo A Rodela
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