Patent attributes
A semiconductor device, and a method of fabrication, is introduced. In an embodiment, one or more passivation layers are formed over a first substrate. Recesses are formed in the passivation layers and a first bonding pad, a second bonding pad, and a first via are formed in the recesses. In some embodiment, the first via may have electrical contact with the first bonding pad and may provide an electrical pathway to a first plurality of metallization layers. The first bonding pad and the second bonding pad in the first substrate are aligned to a third bonding pad and the fourth bonding pad in a second substrate and may be bonded using a direct bonding method. A bond between the first bonding pad and the third bonding pad may provide an electrical pathway between devices on the first substrate and devices on the second substrate.
