US Patent 9262303 Automated semiconductor design flaw detection system
Patent 9262303 was granted and assigned to Altera on February, 2016 by the United States Patent and Trademark Office.
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A simulation system enables comparison of a realized physical implementation against the simulation models that produce them, thereby detecting differences between an initial, logical design and the resulting physical embodiment. Errors introduced by an initial design, faulty Intellectual Property blocks, faulty programmable logic device silicon, faulty synthesis algorithms and software, and/or faulty place and route algorithms and software may be detected. As a result, the simulation system reflects both the accuracy of the actual implemented device with the capacity and performance of a purpose built hardware-assisted solution.
US Patent 09262303 Automated semiconductor design flaw detection system US Patent 9262303 Automated semiconductor design flaw detection system
US Patent 09262303 Automated semiconductor design flaw detection system
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