Patent attributes
A semiconductor device includes at least one semiconductor fin on an upper surface of a semiconductor substrate, and at least one metal gate stack formed on the upper surface of the semiconductor substrate. One or more pairs of source/drain contact structures are formed on the upper surface of the semiconductor fin. Each source/drain contact structure includes a metal contact stack, a spacer, and a cap spacer. The metal contact stack is formed on the upper surface of the fin. The spacer is interposed between a contact sidewall of the metal contact stack and a gate sidewall of the at least one metal gate stack. The cap spacer is formed on an upper surface of the metal contact stack and has a cap portion disposed against the spacer such that the metal gate stack is interposed between the opposing source/drain contact structures.