Is a
Patent attributes
Patent Jurisdiction
Patent Number
Patent Inventor Names
Arun Virupaksha Gowda0
Paul Alan McConnelee0
Shakti Singh Chauhan0
Date of Patent
July 11, 2017
Patent Application Number
14665735
Date Filed
March 23, 2015
Patent Citations Received
Patent Primary Examiner
Patent abstract
A power overlay (POL) structure includes a POL sub-module. The POL sub-module includes a dielectric layer and a semiconductor device having a top surface attached to the dielectric layer. The top surface of the semiconductor device has at least one contact pad formed thereon. The POL sub-module also includes a metal interconnect structure that extends through the dielectric layer and is electrically coupled to the at least one contact pad of the semiconductor device. A conducting shim is coupled to a bottom surface of the semiconductor device and a first side of a thermal interface is coupled to the conducting shim. A heat sink is coupled to a second side of the electrically insulating thermal interface.
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