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US Patent 9792995 Independent multi-plane read and low latency hybrid read
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Patent
Date Filed
April 26, 2016
Date of Patent
October 17, 2017
Patent Application Number
15138467
Patent Citations Received
US Patent 12106810 Memory device and asynchronous multi-plane independent read operation thereof
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US Patent 11929125 Window program verify to reduce data latch usage in memory device
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US Patent 12080374 Semiconductor storage device
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US Patent 12093532 Data reading method, memory storage device, and memory control circuit unit
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US Patent 11756629 Memory device and asynchronous multi-plane independent read operation thereof
US Patent 11763892 Memory device and asynchronous multi-plane independent read operation thereof
US Patent 11775223 Memory controller and storage device including 1HE same
US Patent 11894077 Self-diagnostic smart verify algorithm in user mode to prevent unreliable acquired smart verify program voltage
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Patent Jurisdiction
United States Patent and Trademark Office
Patent Number
9792995
Patent Primary Examiner
VanThu Nguyen
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