US Patent 9972529 Method of forming metal interconnection

A method of fabricating a semiconductor device is disclosed. The method includes forming a first conductive feature over a substrate, forming a dielectric layer over the first conductive feature, forming a via trench in the dielectric layer, forming a first barrier layer in the via trench. Therefore the first barrier has a first portion disposed over the dielectric layer and a second portion disposed over the first conductive feature, applying a thermal treatment to convert the first portion of the barrier layer to a second barrier layer and exposing the first conductive feature in the via trench while a portion of the second barrier layer is disposed over the dielectric layer.