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M. Mujtaba K Chaudry

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Edits on 14 Dec, 2021
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edited on 14 Dec, 2021
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Patent primary examiner of
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US Patent 7383483 Data transfer error checking
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US Patent 7383484 Cyclic redundancy check based message passing in turbo product code decoding
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US Patent 7398450 Parallel precoder circuit
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US Patent 7398452 Method and system for determining a signal quality metric in event of a CRC false positive
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US Patent 7406647 Systems and methods for forward error correction in a wireless communication network
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US Patent 7406648 Methods for coding and decoding LDPC codes, and method for forming LDPC parity check matrix
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US Patent 7406653 Anomaly detection based on directional data
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US Patent 7415656 Techniques to preserve bandwidth in a communication system
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US Patent 7418645 Error correction/detection code adjustment for known data pattern substitution
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US Patent 7424665 Device and method for selecting opcode values with maximum hamming distance to minimize latency and buffering requirements
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US Patent 7441175 Turbo product code implementation and decoding termination method and apparatus
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US Patent 7447972 Methods and apparatus for constructing low-density parity check (LDPC) matrix
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US Patent 7451360 Method for monitoring an internal control signal of a memory device and apparatus therefor
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US Patent 7458008 Decision voting in a parallel decoder
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US Patent 7461321 Error detection
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US Patent 7461329 Channel encoding adapted to error bursts
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US Patent 7464314 Method for validating an integrated circuit and related semiconductor product thereof
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US Patent 7467337 Semiconductor memory device
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US Patent 7467346 Decoding error correction codes using a modular single recursion implementation
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US Patent 7469375 Systems and methods for managing error dependencies
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US Patent 7472319 Remote control signal receiver and remote control signal receiving method
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US Patent 7472328 Automatic testing of microprocessor bus integrity
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US Patent 7472330 Magnetic memory which compares compressed fault maps
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US Patent 7472333 Encoding method and apparatus for cross interleaved cyclic codes
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US Patent 7472334 Efficient method for the reconstruction of digital information
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US Patent 7472337 Method and system for detecting faults in an electronic engine control module
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US Patent 7475324 Encoding apparatus for storing data to disk
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US Patent 7475328 Loop status monitoring apparatus
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US Patent 7478306 Method of detecting error location, and error detection circuit, error correction circuit, and reproducing apparatus using the method
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US Patent 7478312 Method and apparatus for performing turbo encoding in a 3GPP mobile communication system
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US Patent 7480845 Method and apparatus for generating block-based low-density parity check matrix and recording medium having recorded thereon code for implementing the method
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US Patent 7480850 Method of writing data and channel adapter
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US Patent 7487415 Memory circuitry with data validation
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US Patent 7487429 Simple decoding method and apparatus
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US Patent 7519895 Channel encoding/decoding apparatus and method using a parallel concatenated low density parity check code
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US Patent 7530002 Sub-matrix-based implementation of LDPC (Low Density Parity Check) decoder
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US Patent 7530007 Iterative decoding of packet data
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US Patent 7543217 Method of determining suitability of a recording medium for being recorded to and/or reproduced from by an apparatus
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US Patent 7546517 Error-correcting circuit for high density memory
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US Patent 7551478 Apparatus, method and computer program product for reading information stored in storage medium
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US Patent 7555695 Data transmitting apparatus, data receiving apparatus, data transmitting method, and data receiving method
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US Patent 7555696 Method and apparatus for forward error correction in a content distribution system
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US Patent 7559010 Short length LDPC (Low Density Parity Check) code and modulation adapted for high speed Ethernet applications
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US Patent 7562281 Autonomic parity exchange
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US Patent 7571371 Parallel parity checking for content addressable memory and ternary content addressable memory
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US Patent 7574648 Semiconductor device
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US Patent 7581159 Simplified decoding using structured and punctured LDPC codes
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US Patent 7584405 Fault-detecting computer system
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US Patent 7590919 Apparatus, method and computer program product for reading information stored in storage medium, and storage medium for storing information based on charge amount
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US Patent 7590923 Architecture and control of Reed-Solomon error identification and evaluation
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US Patent 7590924 Architecture and control of Reed-Solomon list decoding
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US Patent 7596738 Method and apparatus for classifying memory errors
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US Patent 7600163 Convolutional interleaver and deinterleaver
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US Patent 7603609 Method and system for optimized instruction fetch to protect against soft and hard errors
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US Patent 7603614 Method and system for indicating an executable as trojan horse
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US Patent 7607073 Methods, algorithms, software, circuits, receivers and systems for iteratively decoding a tailbiting convolutional code
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US Patent 7613958 Error detection in a system having coupled channels
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US Patent 7617433 Implementation of LDPC (low density parity check) decoder by sweeping through sub-matrices
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US Patent 7624336 Selection of status data from synchronous redundant devices
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US Patent 7631241 Apparatus and method for decoding low density parity check codes
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US Patent 7631247 Method of process configuration for multiple HARQ processes
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US Patent 7640480 Detection of errors in the communication of data
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US Patent 7644347 Silent data corruption mitigation using error correction code with embedded signaling fault detection
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US Patent 7647541 Method and apparatus for assigning hybrid-automatic repeat request processes
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US Patent 7650558 Systems, methods, and apparatuses for using the same memory type for both error check and non-error check memory systems
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US Patent 7653864 Method and apparatus to perform error control
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US Patent 7653869 System and method for error correction in high definition TV signal
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US Patent 7657821 Error detecting code for multi-character, multi-lane, multi-level physical transmission
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US Patent 7661055 Partial-parallel implementation of LDPC (Low Density Parity Check) decoders
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US Patent 7661056 Circuit arrangement for processing data
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US Patent 7665007 Retrial and reread methods and apparatus for recording channels
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US Patent 7665012 Impulse noise mitigation
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US Patent 7669110 Trace-ahead method and apparatus for determining survivor paths in a Viterbi detector
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US Patent 7673194 Apparatus and method for initializing an integrated circuit device and activating a function of the device once an input power supply has reached a threshold voltage
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US Patent 7673215 Apparatus and method for using an error correcting code to achieve data compression in a data communication network
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US Patent 7676720 Method and system for program based redundancy
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US Patent 7676723 Method for the protected transmission of data, particularly transmission over an air interface
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US Patent 7676725 Method of code generation that minimizes error propagation
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US Patent 7681093 Redundant acknowledgment in loopback entry
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US Patent 7681102 Byte level protection in PCI-Express devices
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US Patent 7685497 Method and apparatus for efficient computation of check equations in periodical low density parity check (LDPC) codes
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US Patent 7685504 Method and apparatus for controlling transmitting, receiving, and re-transmission
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US Patent RE41187 Variable clocked scan test circuitry and method
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US Patent 7689894 Decoding apparatus and method therefor
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US Patent 7689895 On-the fly error checking and correction CODEC system and method for supporting non-volatile memory
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US Patent 7698620 Interleave parameter processing method
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US Patent 7698621 Digital broadcasting system and data processing method
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US Patent 7698625 System for improving parity generation and rebuild performance
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US Patent 7702967 Method for monitoring an internal control signal of a memory device and apparatus therefor
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US Patent 7707474 Outer loop power control with transport block diversity transmission
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US Patent 7707478 Error correction in packet-based communication networks using validation sets
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US Patent 7707479 Method of generating structured irregular low density parity checkcodes for wireless systems
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US Patent 7707481 System and method for efficient uncorrectable error detection in flash memory
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US Patent 7707483 Technique for performing cyclic redundancy code error detection
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US Patent 7712010 Systems, methods and computer program products for utilizing a spare lane for additional checkbits
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US Patent 7721072 Information processing method and apparatus, recording medium, and program
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US Patent 7721182 Soft error protection in individual memory devices
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US Patent 7725779 Multi-valued scrambling and descrambling of digital data on optical disks and other storage media
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US Patent 7725781 Repair techniques for memory with multiple redundancy
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US Patent 7725808 System and method for representing compressed information
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US Patent 7730377 Layered decoding of low density parity check (LDPC) codes
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US Patent 7730381 Erasure detection and power control for a transport channel with unknown format in a wireless communication system
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US Patent 7730382 Method and system for managing memory in a communication system using hybrid automatic repeat request (HARQ)
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US Patent 7734963 Non-causal channel equalization system
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US Patent 7734985 Systems, methods, and apparatuses for using the same memory type to support an error check mode and a non-error check mode
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US Patent 7734993 Method and apparatus for encoding and precoding digital data within modulation code constraints
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US Patent 7743309 Distributed source coding with context
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US Patent 7743314 Method and apparatus for a data-dependent noise predictive viterbi
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US Patent 7747928 Digital wireless communication apparatus
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US Patent 7747929 Apparatus and method for coding/decoding block low density parity check code with variable block length
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US Patent 7747936 Device for protection against error injection into an asynchronous logic block of an elementary logic module
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US Patent 7752515 Accelerated scan circuitry and method for reducing scan test data volume and execution time
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US Patent 7752527 Microcontroller and RAM
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US Patent 7757152 Data corruption scrubbing for content addressable memory and ternary content addressable memory
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US Patent 7757153 Multi-bit memory device and memory system
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US Patent 7761773 Semiconductor device including a unique identifier and error correction code
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US Patent 7765451 Retransmitting apparatus and method using relay station in a multi-hop network
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US Patent 7770088 Techniques to transmit network protocol units
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US Patent 7770089 Method and apparatus for providing reduced memory Low Density Parity Check (LDPC) codes
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US Patent 7774584 Discrete multi-tone (DMT) system and method that communicates a data pump data stream between a general purpose CPU and a DSP via a buffering scheme
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US Patent 7779330 Method and apparatus for computing checksum of packets
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US Patent 7779341 NAND flash memory device performing error detecting and data reloading operation during copy back program operation
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US Patent 7783939 Cache memory, processor, and production methods for cache memory and processor
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US Patent 7783962 Iterative decoding receiver reducing complexity of partial sphere decoding in spatial multiplexing system and method thereof
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US Patent 7788560 Interleaver with linear feedback shift register
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US Patent 7788569 Autonomic parity exchange
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US Patent 7788570 Optimized Reed-Solomon decoder
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US Patent 7788572 Parallel maximum a posteriori detectors with forward and reverse viterbi operators having different convergence lengths on a sampled data sequence
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US Patent 7788574 Error correcting processing device and error correcting processing method
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US Patent 7793173 Efficient memory product for test and soft repair of SRAM with redundancy
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US Patent 7793194 Signal segmentation method and CRC attachment method for reducing undetected error
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US Patent 7793195 Incremental generation of polynomials for decoding reed-solomon codes
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US Patent 7797605 Managing storage of HARQ packets
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US Patent 7797614 Non-redundant multi-error correcting binary differential demodulator
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US Patent 7810009 Apparatus and method for transmitting and receiving packet data using HARQ in a mobile communication system
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US Patent 7814393 Apparatus and method for coding/decoding block low density parity check code with variable block length
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US Patent 7814397 Intelligent error checking method and mechanism
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US Patent 7818651 Semiconductor memory device having data holding mode using ECC function
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US Patent 7818652 Image forming system, image processing apparatus, determination device, and image processing method
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US Patent 7823047 Device and method for generating a base band signal and program causing computer to execute the method
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US Patent 7823053 System and method for searching error messages
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US Patent 7827459 Communications protocol
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US Patent 7827462 Combined command and data code
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US Patent 7827471 Determining message residue using a set of polynomials
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US Patent 7831887 Method and apparatus for using long forward error correcting codes in a content distribution system
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US Patent 7836378 System to detect and identify errors in control information, read data and/or write data
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US Patent 7840869 Forward error correction scheme for data channels using universal turbo codes
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US Patent 7840871 Forward error correction scheme for data channels using universal turbo codes
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US Patent 7840873 Partial CRC insertion in data packets for early forwarding
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US Patent 7840879 Wireless mobile device
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US Patent 7840884 Turbo decoding with iterative estimation of channel parameters
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US Patent 7844881 Transmitting apparatus and transmitting method
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US Patent 7844886 Parallel processing error detection and location circuitry for configuration random-access memory
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US Patent 7849377 SISO decoder with sub-block processing and sub-block based stopping criterion
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US Patent 7849381 Method for copying data in reprogrammable non-volatile memory
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US Patent 7856586 Method and system for providing short block length low density parity check (LDPC) codes in support of broadband satellite applications
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US Patent 7861136 Error correcting apparatus and error correcting method
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US Patent 7861141 Method and device for error analysis of optical disc
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US Patent 7865808 Fast error detection system and related methods
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US Patent 7865813 Rate matching for a wireless communications systems
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US Patent 7870460 Magnetic disk drive capable of refreshing data written to disk and data refresh method
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US Patent 7870463 Optical disc recording and playback apparatus
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US Patent 7870466 Parallel cyclic code generation device and parallel cyclic code error detection device
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US Patent 7873898 System and method for searching error messages
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US Patent 7882418 LDPC encoder and decoder and LDPC encoding and decoding methods
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US Patent 7886214 Determining a message residue
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US Patent 7890797 Vehicle including a processor system having fault tolerance
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US Patent 7890840 Enhancing the Ethernet FEC state machine to strengthen correlator performance
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US Patent 7895509 Error checking parity and syndrome of a block of data with relocated parity bits
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US Patent 7900121 Method and device for determining indices assigned to correction symbols
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US Patent 7900123 Method for near maximum-likelihood sequential decoding
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US Patent 7908540 Method of transmitting ethernet frame in network bridge and the bridge
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US Patent 7908542 Method of and apparatus for implementing a reconfigurable trellis-type decoding
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US Patent 7908546 Methods and apparatus for detection of performance conditions in processing system
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US Patent 7913146 Optical disk manufacturing method and device, optical disk, and reproduction method thereof
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US Patent 7921347 Method and apparatus for performing automatic retransmission request in a mobile communication system
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US Patent 7930619 Apparatus and method for encoding low density parity check codes in a communication system
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US Patent 7934143 Parity insertion for inner architecture
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US Patent 7934145 DTV transmitting system and receiving system and method of processing television signal
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US Patent 7937642 Apparatus and method for receiving signal in a communication system
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US Patent 7937650 Maximum likelihood decoder and decoding method therefor
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US Patent 7941729 Data storage device and error processing method in its read processing
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US Patent 7941734 Method and apparatus for decoding shortened BCH codes or reed-solomon codes
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US Patent 7945836 Method and apparatus for reducing signaling overhead in a communication system using hybrid automatic repeat request
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US Patent 7945842 Method and apparatus for rateless source coding with/without decoder side information
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US Patent 7954036 Method and system for providing low density parity check (LDPC) encoding
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US Patent 7954040 Encoding method and apparatus for cross interleaved cyclic codes
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US Patent 7958428 LDPC (low density parity check) coded signal decoding using parallel and simultaneous bit node and check node processing
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US Patent 7958429 Distributed processing LDPC (low density parity check) decoder
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US Patent 7958434 Method for synchronizing to a digital signal
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US Patent 7962828 Apparatus and method for coding/decoding block low density parity check code in a mobile communication system
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US Patent 7962830 Method and system for routing in low density parity check (LDPC) decoders
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US Patent 7966541 Signal encoding method and device, method for encoding joint feedback signal
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US Patent 7971122 Method of computing partial CRCS
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US Patent 7975211 Data decoding method and apparatus and receiver and communication system applying the same
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US Patent 7984362 Method for static fault code synchronization in an internal combustion engine
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US Patent 7984366 Efficient chien search method in reed-solomon decoding, and machine-readable recording medium including instructions for executing the method
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US Patent 7987403 Method and apparatus for encoding feedback signal
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US Patent 7987409 Automatic request apparatus and method for multihop system in broadband wireless access communication network
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US Patent 8001451 Trellis encoder and trellis encoding device having the same
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US Patent 8006158 Hybrid automatic repeat request method in a mobile communication system and transmission/reception method and apparatus using the same
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US Patent 8006162 Method for padding and puncturing low density parity check code
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US Patent 8006169 Data transfer error checking
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US Patent 8010870 Coding apparatus and coding method
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US Patent 8010872 Electronic controller
Edits on 8 Dec, 2021
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Golden AI
edited on 8 Dec, 2021
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US Patent 8010870 Coding apparatus and coding method
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edited on 8 Dec, 2021
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Infobox
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US Patent 8010872 Electronic controller
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Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
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US Patent 8006162 Method for padding and puncturing low density parity check code
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Golden AI
edited on 8 Dec, 2021
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Golden AI
edited on 8 Dec, 2021
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Infobox
Patent primary examiner of
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US Patent 8006169 Data transfer error checking
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Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
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US Patent 8001451 Trellis encoder and trellis encoding device having the same
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Golden AI
edited on 8 Dec, 2021
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Golden AI
edited on 8 Dec, 2021
Edits made to:
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Infobox
Patent primary examiner of
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US Patent 7987403 Method and apparatus for encoding feedback signal
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Golden AI
edited on 8 Dec, 2021
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Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
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US Patent 7984362 Method for static fault code synchronization in an internal combustion engine
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Golden AI
edited on 8 Dec, 2021
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Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
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US Patent 7971122 Method of computing partial CRCS
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Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
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US Patent 7966541 Signal encoding method and device, method for encoding joint feedback signal
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Golden AI
edited on 8 Dec, 2021
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Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
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US Patent 7962830 Method and system for routing in low density parity check (LDPC) decoders
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Golden AI
edited on 7 Dec, 2021
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Patent primary examiner of
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US Patent 7958429 Distributed processing LDPC (low density parity check) decoder
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edited on 7 Dec, 2021
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Golden AI
edited on 7 Dec, 2021
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US Patent 7958434 Method for synchronizing to a digital signal
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Golden AI
edited on 7 Dec, 2021
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Patent primary examiner of
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US Patent 7954040 Encoding method and apparatus for cross interleaved cyclic codes

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