Patent attributes
A method fabricates a lateral non-volatile storage cell. The lateral non-volatile storage cell includes a first transistor including a first transistor body formed on a dielectric layer. The first transistor includes a source region and drain region on opposite sides of the first transistor body. A second transistor is laterally adjacent to the first transistor and includes a second transistor body, parallel with the first transistor body, formed on the dielectric layer. A first layer of gate oxide of a first thickness is formed over the first transistor body, and a second layer of gate oxide of a second thickness is formed over a portion of the second transistor body. The first thickness and the second thickness are different. A floating gate is formed over the first layer of gate oxide, the second layer of gate oxide, and the dielectric layer.