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US Patent 11037919 Techniques for processing devices

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
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Date Filed
July 2, 2020
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Date of Patent
June 15, 2021
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Patent Application Number
16919989
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Patent Citations
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US Patent 10269756 Die processing
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US Patent 10075657 Edgeless large area camera system
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US Patent 10727219 Techniques for processing devices
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US Patent 10276619 Semiconductor device structure with a conductive feature passing through a passivation layer
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US Patent 10026605 Method of reducing residual contamination in singulated semiconductor die
Patent Citations Received
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US Patent 12136605 Layer structures for making direct metal-to-metal bonds at low temperatures in microelectronics and method for forming the same
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US Patent 12068278 Processed stacked dies
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US Patent 12074092 Hard IP blocks with physically bidirectional passageways
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US Patent 12113054 Non-volatile dynamic random access memory
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US Patent 12113056 Stacked dies and methods for forming bonded structures
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US Patent 11552041 Chemical mechanical polishing for hybrid bonding
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US Patent 11621246 Diffused bitline replacement in stacked wafer memory
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US Patent 11626363 Bonded structures with integrated passive component
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US Patent 11631586 Heterogeneous annealing method
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US Patent 11664357 Techniques for joining dissimilar materials in microelectronics
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•••
Patent Inventor Names
Gaius Gillman Fountain, Jr.
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Guilian Gao
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Laura Wills Mirkarimi
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Cyprian Emeka Uzoh
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
11037919
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Patent Primary Examiner
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Brook Kebede
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