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US Patent 11367652 Microelectronic assembly from processed substrate

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
Date Filed
April 7, 2020
Date of Patent
June 21, 2022
Patent Application Number
16842233
Patent Citations
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US Patent 10269756 Die processing
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US Patent 10026605 Method of reducing residual contamination in singulated semiconductor die
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US Patent 10075657 Edgeless large area camera system
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US Patent 10276619 Semiconductor device structure with a conductive feature passing through a passivation layer
Patent Citations Received
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US Patent 12125784 Interconnect structures
0
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US Patent 11694925 Diffusion barrier collar for interconnects
0
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US Patent 11756880 Interconnect structures
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US Patent 11760059 Method of room temperature covalent bonding
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US Patent 11790219 Three dimensional circuit implementing machine trained network
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US Patent 12113054 Non-volatile dynamic random access memory
0
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US Patent 12113056 Stacked dies and methods for forming bonded structures
0
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US Patent 11621246 Diffused bitline replacement in stacked wafer memory
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US Patent 11842894 Electrical redundancy for bonded structures
0
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US Patent 11862602 Scalable architecture for reduced cycles across SOC
0
•••
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
11367652
Patent Primary Examiner
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Long Pham

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