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US Patent 11398415 Stacked through-silicon vias for multi-device packages

Patent 11398415 was granted and assigned to Intel on July, 2022 by the United States Patent and Trademark Office.

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
Current Assignee
Intel
Intel
Date Filed
June 25, 2019
Date of Patent
July 26, 2022
Patent Applicant
Intel
Intel
Patent Application Number
16451521
Patent Citations
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US Patent 10079199 Through-substrate via structure and method of manufacture
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US Patent 10483182 Intermediate connector, semiconductor device including intermediate connector, and method of manufacturing intermediate connector
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US Patent 10304792 Semiconductor package having reduced internal power pad pitch
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US Patent 10892223 Advanced lithography and self-assembled devices
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US Patent 10903142 Micro through-silicon via for transistor density scaling
0
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US Patent 10943792 3D stacked-in-recess system in package
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US Patent 10950534 Through-substrate via structure and method of manufacture
0
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US Patent 10991667 Isolation structure for bond pad structure
0
Patent Inventor Names
Bok Eng Cheah
0
Choong Kooi Chee
0
Jackson Chung Peng Kong
0
Tat Hin Tan
0
Wai Ling Lee
0
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
11398415
Patent Primary Examiner
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Victoria K. Hall
CPC Code
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H01L 23/481
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H01L 23/528

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