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US Patent 11756837 Hybrid nanosheet tunnel-FET/CMOS technology

Overview Structured Data Issues Contributors Activity

Is a

Date Filed

March 17, 2021

Date of Patent

September 12, 2023

Patent Application Number

17204016

Patent Citations

US Patent 9647098 Thermionically-overdriven tunnel FETs and methods of fabricating the same

US Patent 9755017 Co-integration of silicon and silicon-germanium channels for nanosheet devices

US Patent 9960232 Horizontal nanosheet FETs and methods of manufacturing the same

US Patent 9991261 Gate-all-around nanowire device and method for manufacturing such a device

US Patent 10090193 Integrated circuit structure incorporating a stacked pair of field effect transistors and a buried interconnect and method

US Patent 10134640 Semiconductor device structure with semiconductor wire

US Patent 10256158 Insulated epitaxial structures in nanosheet complementary field effect transistors

US Patent 10263075 Nanosheet CMOS transistors

US Patent 10340195 Method to co-integrate SiGe and Si channels for finFET devices

US Patent 10355085 Semiconductor devices with regrown contacts and methods of fabrication

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Patent Inventor Names

Cezar Bogdan Zota

Clarissa Convertino

Kirsten Emilie Moselund

Patent Jurisdiction

United States Patent and Trademark Office

Patent Number

Patent Primary Examiner

CPC Code

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