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US Patent 11837582 Molded direct bonded and interconnected stack

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
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Date Filed
December 29, 2022
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Date of Patent
December 5, 2023
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Patent Application Number
18148327
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Patent Citations
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US Patent 10879212 Processed stacked dies
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US Patent 10950547 Stacked IC structure with system level wiring on multiple sides of the IC die
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US Patent 10964664 DBI to Si bonding for simplified handle wafer
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US Patent 10985133 Die processing
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US Patent 10991804 Transistor level interconnection methodologies utilizing 3D interconnects
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US Patent 10998292 Offset pads over TSV
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US Patent 11011503 Direct-bonded optoelectronic interconnect for high-density integrated photonics
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US Patent 11031285 Diffusion barrier collar for interconnects
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US Patent 11056348 Bonding surfaces for microelectronics
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US Patent 11056390 Structures and methods for reliable packages
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•••
Patent Citations Received
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US Patent 11955463 Direct bonded stack structures for increased reliability and improved yield in microelectronics
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US Patent 12113056 Stacked dies and methods for forming bonded structures
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Patent Inventor Names
Cyprian Emeka Uzoh
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Belgacem Haba
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Guilian Gao
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Jeremy Alfred Theil
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Rajesh Katkar
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
11837582
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Patent Primary Examiner
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Jose R Diaz
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CPC Code
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H01L 25/112
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H01L 25/0657
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H01L 25/071
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H01L 25/0652
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H01L 23/3135
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