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US Patent 11913121 Fabrication method of substrate having electrical interconnection structures

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
0
Date Filed
August 12, 2020
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Date of Patent
February 27, 2024
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Patent Application Number
16991999
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Patent Citations
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US Patent 9903024 Substrate having electrical interconnection structures and fabrication method thereof
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US Patent 8901736 Strength of micro-bump joints
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US Patent 9706652 Printed circuit board and method for manufacturing same
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US Patent 6878633 Flip-chip structure and method for high quality inductors and transformers
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US Patent 7250362 Solder bump structure and method for forming the same
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US Patent 7341949 Process for forming lead-free bump on electronic component
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US Patent 7915088 Wiring board manufacturing method, semiconductor device manufacturing method and wiring board
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US Patent 7960270 Method for fabricating circuit component
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US Patent 7969003 Bump structure having a reinforcement member
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US Patent 7994045 Bumped chip package fabrication method and structure
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•••
Patent Inventor Names
Chun-Hung Lu
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Po-Yi Wu
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
11913121
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Patent Primary Examiner
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Minh N Trinh
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CPC Code
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H01L 2224/11
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H01L 21/4857
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C23F 1/00
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H01L 2224/16225
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H01L 21/486
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