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US Patent 11923246 Via CD controllable top via structure

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
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Date Filed
September 15, 2021
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Date of Patent
March 5, 2024
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Patent Application Number
17475463
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Patent Citations
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US Patent 9484258 Method for producing self-aligned vias
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US Patent 9659821 Method of forming interconnect structures by self-aligned approach
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US Patent 9613861 Damascene wires with top via structures
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US Patent 9852986 Method of patterning pillars to form variable continuity cuts in interconnection lines of an integrated circuit
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US Patent 8062971 Dual damascene process
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US Patent 9087844 Semiconductor device and fabricating method thereof
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Patent Inventor Names
Koichi Motoyama
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Chanro Park
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Ekmini Anuja De Silva
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Dominik Metzler
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Hsueh-Chung Chen
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
11923246
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Patent Primary Examiner
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Shahed Ahmed
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CPC Code
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H01L 23/53252
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H01L 23/5283
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H01L 23/528
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H01L 23/5226
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H01L 21/76852
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H01L 21/76885
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H01L 21/76816
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H01L 21/76897
0

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