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US Patent 12132092 Backside vias in semiconductor device
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Patent
0
Date Filed
May 13, 2022
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Date of Patent
October 29, 2024
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Patent Application Number
17743992
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Patent Citations
US Patent 10872820 Integrated circuit structures
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US Patent 9520482 Method of cutting metal gate
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US Patent 9536738 Vertical gate all around (VGAA) devices and methods of manufacturing the same
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US Patent 9576814 Method of spacer patterning to form a target integrated circuit pattern
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US Patent 9608116 FINFETs with wrap-around silicide and method forming the same
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US Patent 9812580 Deep trench active device with backside body contact
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US Patent 10355017 CMOS devices containing asymmetric contact via structures and method of making the same
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US Patent 10756017 Contact structure and method of forming
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US Patent 10840146 Structures and SRAM bit cells with a buried cross-couple interconnect
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US Patent 9209247 Self-aligned wrapped-around structure
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•••
Patent Inventor Names
Chih-Hao Wang
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Lin-Yu Huang
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Cheng-Chi Chuang
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Li-Zhen Yu
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Huan-Chieh Su
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Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
12132092
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Patent Primary Examiner
David C Spalla
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CPC Code
H01L 27/1211
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H01L 29/0653
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H01L 29/41791
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H01L 29/4238
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H01L 29/4933
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H01L 29/6653
0
H01L 29/66553
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H01L 29/6656
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H01L 29/66795
0
H01L 29/785
0
•••
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