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Son L. Mai
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Patent primary examiner of
US Patent 7113420 Molecular memory cell
US Patent 7113433 Local bit select with suppression of fast read before write
US Patent 11176989 Semiconductor memory device having page buffer high-voltage circuit
US Patent 7135734 Graded composition metal oxide tunnel barrier interpoly insulators
US Patent 7136317 DRAM with self-resetting data path for reduced power consumption
US Patent 7136323 Apparatus and method for generating a variable-frequency clock
US Patent 7142466 Determining optimal time instances to sense the output of a memory array which can generate data outputs with variable delay
US Patent 7145809 Method for programming multi-level cell
US Patent 7145816 Using redundant memory for extra features
US Patent 7145818 Semiconductor integrated circuit device having test circuit
US Patent 7145824 Temperature compensation of thin film diode voltage threshold in memory sensing circuit
US Patent 7149130 Page buffer circuit of flash memory device with reduced consumption power
US Patent 7151712 Row decoder with low gate induce drain leakage current
US Patent 7154771 Method of switching an MRAM cell comprising bidirectional current generation
US Patent 7158419 Methods of fabricating flash memory devices including multiple dummy cell array regions
US Patent 7161820 Memory module and memory system having an expandable signal transmission, increased signal transmission and/or high capacity memory
US Patent 7161867 Semiconductor memory device
US Patent 7167401 Low power chip select (CS) latency option
US Patent 7170799 SRAM and dual single ended bit sense for an SRAM
US Patent 7170801 Method for replacing defects in a memory and apparatus thereof
US Patent 7173856 Sense amplifier for a non-volatile memory device
US Patent 7177182 Rewriteable electronic fuses
US Patent 7180764 One-time programmable (OTP) memory devices enabling programming based on protected status and methods of operating same
US Patent 7180773 Magnetic memory device
US Patent 7180777 System and method for destructive purge of memory device
US Patent 7180785 Nonvolatile semiconductor memory device with a plurality of sectors
US Patent 7180804 High performance sense amplifier and method thereof for memory system
US Patent 7184307 Flash memory device capable of preventing program disturbance according to partial programming
US Patent 7184334 Semiconductor memory device and method of testing semiconductor memory device
US Patent 7184344 Semiconductor device comprising a differential sense amplifier, a write column selection switch and a read column selection switch
US Patent 7184349 Semiconductor memory device
US Patent 7187591 Memory device and method for erasing memory
US Patent 7187605 Semiconductor storage device
US Patent 7190611 Spin-transfer multilayer stack containing magnetic layers with resettable magnetization
US Patent 7193877 Content addressable memory with reduced test time
US Patent 7193905 RRAM flipflop rcell memory generator
US Patent 7196942 Configuration memory structure
US Patent 7196951 Semiconductor memory
US Patent 7196963 Address isolation for user-defined configuration memory in programmable devices
US Patent 7200044 Page buffer circuit with reduced size, and flash memory device having page buffer and program operation method thereof
US Patent 7203096 Method and apparatus for sensing a state of a memory cell
US Patent 7209386 Charge trapping non-volatile memory and method for gate-by-gate erase for same
US Patent 7212458 Memory, processing system and methods for use therewith
US Patent 7215575 Detecting over programmed memory
US Patent 7215586 Apparatus and method for repairing a semiconductor memory
US Patent 7218561 Apparatus and method for semiconductor device repair with reduced number of programmable elements
US Patent 7221598 Method of controlling program operation of flash memory device with reduced program time
US Patent 7221601 Timer lockout circuit for synchronous applications
US Patent 7221604 Memory structure with repairing function and repairing method thereof
US Patent 7224595 276-Pin buffered memory module with enhanced fault tolerance
US Patent 7224605 Non-volatile memory with redundancy data buffered in data latches for defective locations
US Patent 7227776 Phase change random access memory (PRAM) device
US Patent 7227792 Internal voltage level control circuit and semiconductor memory device as well as method of controlling the same
US Patent 7227793 Voltage translator for multiple voltage operations
US Patent 7227795 Data output circuit, data output method, and semiconductor memory device
US Patent 7227806 High speed wordline decoder for driving a long wordline
US Patent 7230869 Method and apparatus for accessing contents of memory cells
US Patent 7233518 Radiation-hardened SRAM cell with write error protection
US Patent 7233527 Nonvolatile memory structure
US Patent 7233528 Reduction of programming time in electrically programmable devices
US Patent 7233535 Semiconductor memory device
US Patent 7236390 Bit cell of organic memory
US Patent 7236424 Semiconductor memory device
US Patent 7239548 Method and apparatus for applying bias to a storage device
US Patent 7239555 Erasing method for non-volatile memory
US Patent 7239568 Current threshold detector
US Patent 7239574 Synchronous storage device and control method therefor
US Patent 7242610 Ultraviolet erasable semiconductor memory device
US Patent 7242612 Non-volatile memory devices and methods for driving the same
US Patent 7242620 Nonvolatile semiconductor memory device and an operation method thereof
US Patent 7245521 Semiconductor integrated circuit device
US Patent 7245522 Magnetic memory device, method for writing magnetic memory device and method for reading magnetic memory device
US Patent 7245523 Bistable magnetic device using soft magnetic intermediary material
US Patent 7248505 Flash memory device
US Patent 7248510 Circuits that generate an internal supply voltage and semiconductor memory devices that include those circuits
US Patent 7248528 Refresh control method of a semiconductor memory device and semiconductor memory device
US Patent 7251155 Device and method having a memory array storing each bit in multiple memory cells
US Patent 7254082 Semiconductor device
US Patent 7257011 Semiconductor memory having twisted bit line architecture
US Patent 7259988 Method for managing memory blocks in flash memory
US Patent 7260002 Methods and devices for preventing data stored in memory from being read out
US Patent 7262993 Nonvolatile semiconductor memory device
US Patent 7263024 Clock reset address decoder for block memory
US Patent 7266022 Memory interface control circuit
US Patent 7266039 Circuitry and method for adjusting signal length
US Patent 7269057 Method for connecting circuit elements within an integrated circuit for reducing single-event upsets
US Patent 7269075 Method and apparatus for simultaneous differential data sensing and capture in a high speed memory
US Patent 7269077 Memory architecture of display device and memory writing method for the same
US Patent 7269083 Using redundant memory for extra features
US Patent 7272031 Method and apparatus for reduced power cell
US Patent 7272061 Dynamic pre-charge level control in semiconductor devices
US Patent 7272063 Memory with a temperature sensor, dynamic memory and memory with a clock unit and method of sensing a temperature of a memory
US Patent 7274581 Array fault testing approach for TCAMs
US Patent 7274600 NAND flash memory with read and verification threshold uniformity
US Patent 7274601 Programming and erasing method for charge-trapping memory devices
US Patent 7274606 Low power chip select (CS) latency option
US Patent 7274608 Semiconductor memory device and a method of redressing a memory cell
US Patent 7280391 Phase change memory device for use in a burst read operation and a data reading method thereof
US Patent 7280392 Integrated memory device and method for operating the same
US Patent 7280407 Semiconductor memory device including floating gates and control gates, control method for the same, and memory card including the same
US Patent 7280423 Current-mode sensing structure of high-density multiple-port register in embedded flash memory procedure and method for the same
US Patent 7283387 Phase change random access memory device having variable drive voltage circuit
US Patent 7286391 Semiconductor memory device capable of controlling potential level of power supply line and/or ground line
US Patent 7286392 Data retention indicator for magnetic memories
US Patent 7286413 Non-volatile memory device and method of programming same
US Patent 7286415 Semiconductor memory devices having a dual port mode and methods of operating the same
US Patent 7286425 System and method for capacitive mis-match bit-line sensing
US Patent 7289364 Programmable memory device with an improved redundancy structure
US Patent 7289375 Data holding circuit
US Patent 7292469 Methods of programming non-volatile memory devices including transition metal oxide layer as data storage material layer and devices so operated
US Patent 7295463 Phase-changeable memory device and method of manufacturing the same
US Patent 7301826 Memory, processing system and methods for use therewith
US Patent 7301831 Memory systems with variable delays for write data signals
US Patent 7301844 Semiconductor device
US Patent 7304884 Semiconductor memory device
US Patent 7304888 Reverse-bias method for writing memory cells in a memory array
US Patent 7304900 Semiconductor memory
US Patent 7307882 Non-volatile memory
US Patent 7310279 Semiconductor memory device and semiconductor integrated circuit
US Patent 7313011 Ferroelectric memory devices having a plate line control circuit
US Patent 7313028 Method for operating page buffer of nonvolatile memory device
US Patent 7313032 SRAM voltage control for improved operational margins
US Patent 7317630 Nonvolatile semiconductor memory apparatus
US Patent 7321511 Semiconductor device and method for controlling operation thereof
US Patent 7324401 Memory device and method having programmable address configurations
US Patent 7333367 Flash memory devices including multiple dummy cell array regions
US Patent 7336543 Non-volatile memory device with page buffer having dual registers and methods using the same
US Patent 7336554 Semiconductor memory device having a reduced number of pins
US Patent RE40132 Large scale integrated circuit with sense amplifier circuits for low voltage operation
US Patent 7342816 Daisy chainable memory chip
US Patent 7345900 Daisy chained memory system
US Patent 7345901 Computer system having daisy chained self timed memory chips
US Patent 7345919 Semiconductor device that enables simultaneous read and write/read operation
US Patent RE40172 Multi-bank testing apparatus for a synchronous dram
US Patent 7349233 Memory device with read data from different banks
US Patent 7349265 Reading method of a NAND-type memory device and NAND-type memory device
US Patent 7352608 Controllable nanomechanical memory element
US Patent 7352613 Magnetic memory device and methods for making a magnetic memory device
US Patent 7355874 Computer memory cards using flash EEprom integrated circuit chips and memory-controller systems
US Patent 7355879 Semiconductor integrated circuit, operating method thereof, and IC card including the circuit
US Patent 7355910 Semiconductor memory device with shift redundancy circuits
US Patent 7355922 Method and apparatus for initialization of read latency tracking circuit in high-speed DRAM
US Patent 7362619 Data strobe synchronization circuit and method for double data rate, multi-bit writes
US Patent 7362630 Semiconductor memory
US Patent 7362632 Test parallelism increase by tester controllable switching of chip select groups
US Patent 7362633 Parallel read for front end compression mode
US Patent 11183255 Methods and devices for erasing non-volatile memory
US Patent 7366025 Reduced power programming of non-volatile cells
US Patent 7369457 Semiconductor memory device
US Patent 7372751 Using redundant memory for extra features
US Patent 7376005 Thin film magnetic memory device including memory cells having a magnetic tunnel junction
US Patent 7376008 SCR matrix storage device
US Patent 7376010 Nonvolatile semiconductor memory device having protection function for each memory block
US Patent 7376025 Method and apparatus for semiconductor device repair with reduced number of programmable elements
US Patent 7376033 Semiconductor device and programming method therefor
US Patent 7376040 Backup circuit for holding information in a storage circuit when power cut-off occurs
US Patent 7382660 Method for accessing a multilevel nonvolatile memory device of the flash NAND type
US Patent 7382670 Semiconductor integrated circuit device
US Patent 7385851 Repetitive erase verify technique for flash memory devices
US Patent 7385855 Nonvolatile memory device having self reprogramming function
US Patent 7388776 Three-dimensional magnetic memory
US Patent 7388778 Nonvolatile memory devices that support virtual page storage using odd-state memory cells
US Patent 7388782 Semiconductor integrated circuit device
US Patent 7391634 Semiconductor memory devices having controllable input/output bit architectures
US Patent 7391640 2-transistor floating-body dram
US Patent 7391652 Method of programming and erasing a p-channel BE-SONOS NAND flash memory
US Patent 7391669 Semiconductor memory device and core layout thereof
US Patent 7394690 Method for column redundancy using data latches in solid-state memories
US Patent 7394699 Sense amplifier for a non-volatile memory device
US Patent 7394710 Auto-recovery fault tolerant memory synchronization
US Patent 7397686 Memory system combining flash EEPROM and FeRAM
US Patent 7397705 Method for programming multi-level cell memory array
US Patent 7397706 Methods of erasing flash memory devices by applying wordline bias voltages having multiple levels and related flash memory devices
US Patent 7397710 Internal voltage level control circuit and semiconductor memory device as well as method of controlling the same
US Patent 7397726 Flexible RAM clock enable
US Patent 7403409 276-pin buffered memory module with enhanced fault tolerance
US Patent 7403415 Magnetic memory device
US Patent 7408807 NAND string wordline delay reduction
US Patent 7408824 Ferroelectric memory with spare memory cell array and ECC circuit
US Patent 7408825 Apparatus and method for repairing a semiconductor memory
US Patent 7411806 Memory module and memory system
US Patent 7411834 Nonvolatile semiconductor memory device
US Patent 7411838 Semiconductor memory device
US Patent 7414890 Semiconductor device including a high voltage generation circuit and method of a generating high voltage
US Patent 7417884 Memory system
US Patent 7420832 Array split across three-dimensional interconnected chips
US Patent 7420848 Method, system, and circuit for operating a non-volatile memory array
US Patent 7423901 Calibration system for writing and reading multiple states into phase change memory
US Patent 7423915 Random cache read using a double memory
US Patent 7423916 Semiconductor memory device capable of controlling potential level of power supply line and/or ground line
US Patent 7423928 Clock circuitry for DDR-SDRAM memory controller
US Patent 7428170 Voltage generation circuit, flash memory device including the same and method for programming the flash memory device
US Patent 7430136 Purge operations for solid-state storage devices
US Patent 7436714 Nonvolatile semiconductor memory
US Patent 7440316 8/9 and 8/10-bit encoding to reduce peak surge currents when writing phase-change memory
US Patent 7440327 Non-volatile storage with reduced power consumption during read operations
US Patent 7440333 Method of determining voltage compensation for flash memory devices
US Patent 7440334 Multi-transistor memory cells
US Patent 7443735 Method of reducing wordline recovery time
US Patent 7443751 Programmable sense amplifier multiplexer circuit with dynamic latching mode
US Patent 7443754 Semiconductor memory device
US Patent 7443759 Reduced-power memory with per-sector ground control
US Patent 7447079 Method for sensing negative threshold voltages in non-volatile storage using current sensing
US Patent 7447101 PG-gated data retention technique for reducing leakage in memory cells
US Patent 7447102 Memory and operation method thereof
US Patent 7450432 Method of programming data in a flash memory device
US Patent 7450444 High speed DRAM architecture with uniform access latency
US Patent 7457165 Non-volatile memory device and method of programming same
US Patent 7460386 Layout method of a semiconductor memory device
US Patent 7460392 Semiconductor memory device and semiconductor integrated circuit
US Patent 7463525 Negative wordline bias for reduction of leakage current during flash memory operation
US Patent 7466577 Semiconductor storage device having a plurality of stacked memory chips
US Patent 7466594 Dynamic matching of signal path and reference path for sensing
US Patent 7466604 SRAM voltage control for improved operational margins
US Patent 7471540 Non-volatile semiconductor memory based on enhanced gate oxide breakdown
US Patent 7471567 Method for source bias all bit line sensing in non-volatile storage
US Patent 7471568 Multi-level cell memory structures with enlarged second bit operation window
US Patent 7474574 Shift register latch with embedded dynamic random access memory scan only cell
US Patent 7474578 Refresh control circuit and method thereof and bank address signal change circuit and methods thereof
US Patent 7477552 Apparatus and method for reducing leakage currents of integrated circuits having at least one transistor
US Patent 7480174 Methods of programming non-volatile memory devices including transition metal oxide layer as data storage material layer and devices so operated
US Patent 7480193 Memory component with multiple delayed timing signals
US Patent 7480201 Daisy chainable memory chip
US Patent 7480203 Method and apparatus for initialization of read latency tracking circuit in high-speed DRAM
US Patent 7483301 Nonvolatile memory devices that support virtual page storage using odd-state memory cells and methods of programming same
US Patent 7483306 Fast and accurate sensing amplifier for low voltage semiconductor memory
US Patent 7483308 Programming and erasing method for charge-trapping memory devices
US Patent 7483309 Programming and erasing method for charge-trapping memory devices
US Patent 7483313 Dual ported memory with selective read and write protection
US Patent 7486544 Semiconductor integrated circuit device
US Patent 7486576 Methods and devices for preventing data stored in memory from being read out
US Patent 7489554 Method for current sensing with biasing of source and P-well in non-volatile storage
US Patent 7489558 Program method of flash memory capable of compensating read margin reduced due to charge loss
US Patent 7492624 Method and device for demultiplexing a crossbar non-volatile memory
US Patent 7492652 Apparatus and method for repairing a semiconductor memory
US Patent 7495959 Nonvolatile memory device and method of reading information from the same
US Patent 7499345 Non-volatile memory implemented with low-voltages transistors and related system and method
US Patent 7502252 Nonvolatile semiconductor memory device and phase change memory device
US Patent 7502256 Systems and methods for reducing unauthorized data recovery from solid-state storage devices
US Patent 7505298 Transfer of non-associated information on flash memory devices
US Patent 7505304 Fault tolerant asynchronous circuits
US Patent 7512016 Method of programming and erasing a p-channel be-SONOS NAND flash memory
US Patent 7512024 High-speed memory device easily testable by low-speed automatic test equipment and input/output pin control method thereof
US Patent 7515469 Column redundancy RAM for dynamic bit replacement in FLASH memory
US Patent 7515470 Semiconductor integrated circuit device
US Patent 11189325 Device and method for data-writing
US Patent 7522453 Non-volatile memory with source-side column select
US Patent 7525835 Method and apparatus for reduced power cell
US Patent 7529112 276-Pin buffered memory module with enhanced fault tolerance and a performance-optimized pin assignment
US Patent 7529114 Semiconductor memory device
US Patent 7532510 Flash memory device with sector access
US Patent 7532516 Non-volatile storage with current sensing of negative threshold voltages
US Patent 7532536 Semiconductor memory device
US Patent 7535783 Apparatus and method for implementing precise sensing of PCRAM devices
US Patent 7539034 Memory configured on a common substrate
US Patent 7539036 Semiconductor memory device including plurality of memory mats
US Patent 7539044 Memory device with capacitor and diode
US Patent 7539060 Non-volatile storage using current sensing with biasing of source and P-Well
US Patent 7539065 Method of programming non-volatile memory
US Patent 7542348 NOR flash memory including bipolar segment read circuit
US Patent 7542359 Semiconductor memory
US Patent 7545664 Memory system having self timed daisy chained memory chips
US Patent 7545673 Using MLC flash as SLC by writing dummy data
US Patent 7545678 Non-volatile storage with source bias all bit line sensing
US Patent 7548447 Semiconductor memory device and methods thereof
US Patent 7548450 Magnetic memory device, method for writing magnetic memory device and method for reading magnetic memory device
US Patent 7548475 Apparatus of processing a signal in a memory device and a circuit of removing noise in the same
US Patent 7551465 Reference cell layout with enhanced RTN immunity
US Patent 7551468 276-pin buffered memory module with enhanced fault tolerance
US Patent 7551500 Memory cell fuse circuit and controlling method thereof
US Patent 7551505 Memory refresh method and apparatus
US Patent 7554837 Magnetic memory device
US Patent 7558102 Device and method having a memory array storing each bit in multiple memory cells
US Patent 7558120 Semiconductor integrated circuit device comprising MOS transistor having charge storage layer and method for testing semiconductor memory device
US Patent 7558151 Methods and circuits for DDR-2 memory device read data resynchronization
US Patent 7561477 Data strobe synchronization circuit and method for double data rate, multi-bit writes
US Patent 7564710 Circuit for programming a memory element
US Patent 7564718 Method for programming a block of memory cells, non-volatile memory device and memory card device
US Patent 7564719 Method of programming in a flash memory device
US Patent 7564733 Memory device and method having programmable address configurations
US Patent 7570504 Device and method to reduce wordline RC time constant in semiconductor memory devices
US Patent 7573744 Semiconductor memory device having different capacity areas
US Patent 7580291 Data register with efficient erase, program verify, and direct bit-line memory access features
US Patent 7580293 Semiconductor memory device
US Patent 7586781 Magneto-resistance effect element and magnetic memory device
US Patent 7586803 Semiconductor memory device with reduced sense amplification time and operation method thereof
US Patent 7590001 Flash memory with optimized write sector spares
US Patent 7593263 Memory device with reduced reading latency
US Patent 7596033 Nonvolatile semiconductor memory device
US Patent 7599206 Non-volatile semiconductor storage device
US Patent 7599227 Reduced power programming of non-volatile cells
US Patent 7602639 Reading electronic memory utilizing relationships between cell state distributions
US Patent 7606065 Three-dimensional magnetic memory having bits transferrable between storage layers
US Patent 7606096 Semiconductor integrated circuit device
US Patent 7609539 Electrically programmable fuse bit
US Patent 7609551 Semiconductor memory device
US Patent 7609562 Configurable device ID in non-volatile memory
US Patent 7616484 Soft errors handling in EEPROM devices
US Patent 7616497 NOR flash memory and related read method
US Patent 7619914 Semiconductor memory device
US Patent 7619917 Memory cell with trigger element
US Patent 7619933 Reducing effects of program disturb in a memory device
US Patent 7623368 Non-volatile semiconductor memory based on enhanced gate oxide breakdown
US Patent 7626875 Multi-wordline test control circuit and controlling method thereof
US Patent 7630224 Semiconductor integrated circuit device and layout method thereof
US Patent 7630253 Flash memory programming and verification with reduced leakage current
US Patent 7643357 System and method for integrating dynamic leakage reduction with write-assisted SRAM architecture
US Patent 7646646 Nonvolatile semiconductor memory device
US Patent 7652916 SCR matrix storage device
US Patent 7656729 Circuit and method for decoding column addresses in semiconductor memory apparatus
US Patent 7660187 Method and apparatus for initialization of read latency tracking circuit in high-speed DRAM
US Patent 7663903 Semiconductor memory device having improved voltage transmission path and driving method thereof
US Patent 7663943 Semiconductor memory device and method for reading/writing data thereof
US Patent 7663950 Method for column redundancy using data latches in solid-state memories
US Patent 7663959 Power up/down sequence scheme for memory devices
US Patent 7663961 Reduced-power memory with per-sector power/ground control and early address
US Patent 7668026 Data I/O line control circuit and semiconductor integrated circuit having the same
US Patent 7672167 Non-volatile memory device
US Patent 7675811 Method and apparatus for DQS postamble detection and drift compensation in a double data rate (DDR) physical interface
US Patent 7679946 Memory element array having switching elements including a gap of nanometer order
US Patent 7679952 Electronic circuit with a memory matrix
US Patent 7679953 Calibration system for writing and reading multiple states into phase change memory
US Patent 7679987 Clock circuitry for DDR-SDRAM memory controller
US Patent 7684257 Area efficient and fast static random access memory circuit and method
US Patent 7688612 Bit line structure for a multilevel, dual-sided nonvolatile memory cell array
US Patent 7688625 Circuit arrangement and method for operating a circuit arrangement
US Patent 7688627 Flash memory array of floating gate-based non-volatile memory cells
US Patent 7688628 Device selection circuit and method
US Patent 7688643 Device and method for controlling solid-state memory system
US Patent 7688667 Voltage converter circuit and flash memory device having the same
US Patent 7692953 Method and device for demultiplexing a crossbar non-volatile memory
US Patent 7692962 Reduced state quadbit
US Patent 7692974 Memory cell, memory device, device and method of accessing a memory cell
US Patent 7692975 System and method for mitigating reverse bias leakage
US Patent 7692988 Semiconductor device and method of controlling the same
US Patent 7701742 Semiconductor device
US Patent 7701767 Strap-contact scheme for compact array of memory cells
US Patent 7701783 Semiconductor storage device
US Patent 7706191 Systems and methods to reduce interference between memory cells
US Patent 7710773 Nonvolatile memory devices that support virtual page storage using odd-state memory cells
US Patent 7710777 Semi-volatile NAND flash memory
US Patent 7710781 Data storage and processing algorithm for placement of multi-level flash cell (MLC) VT
US Patent 7710789 Synchronous address and data multiplexed mode for SRAM
US Patent 7719913 Sensing circuit for PCRAM applications
US Patent 7724590 Memory controller with multiple delayed timing signals
US Patent 7724596 Auto-zero current sensing amplifier
US Patent 7729153 276-pin buffered memory module with enhanced fault tolerance
US Patent 7738310 Fuse data acquisition
US Patent 7746704 Program-and-erase method for multilevel nonvolatile memory
US Patent 7746712 Semiconductor memory device including post package repair control circuit and post package repair method
US Patent 7751258 Magnetic random access memory
US Patent 7751262 High speed DRAM architecture with uniform access latency
US Patent 7760543 Resistance change memory
US Patent 7760565 Wordline-to-bitline output timing ring oscillator circuit for evaluating storage array performance
US Patent 7764550 Method of programming a non-volatile memory
US Patent 7768824 Magnetoresistive element and magnetoresistive random access memory including the same
US Patent 7773432 Semiconductor memory device with normal and over-drive operations
US Patent 7773435 Semiconductor memory devices for controlling latency
US Patent 7773441 Memory malfunction prediction system and method
US Patent 7773451 Circuit for transforming address
US Patent 7778087 Memory programming method and data access method
US Patent 7778098 Dummy cell for memory circuits
US Patent 7782679 Memory device and reading method
US Patent 7787296 Nonvolatile semiconductor memory device having protection function for each memory block
US Patent 7787308 Flash memory device and program method thereof
US Patent 7787321 High performance sense amplifier and method thereof for memory system
US Patent 7791927 Mis-transistor-based nonvolatile memory circuit with stable and enhanced performance
US Patent 7791966 Apparatus, memory device and method of improving redundancy
US Patent 7796436 Reading method for MLC memory and reading circuit using the same
US Patent 7796465 Write leveling of memory units designed to receive access requests in a sequential chained topology
US Patent 7804710 Multi-layer magnetic random access memory using spin-torque magnetic tunnel junctions and method for write state of the multi-layer magnetic random access memory
US Patent 7804730 Method and apparatus for accessing contents of memory cells
US Patent 7808841 Data output circuit for semiconductor memory apparatus
US Patent 7808848 Semiconductor memory
US Patent 7808849 Read leveling of memory units designed to receive access requests in a sequential chained topology
US Patent 7808853 Semiconductor memory device and method with a changeable substrate potential
US Patent 7808854 Systems and methods for data transfers between memory cells
US Patent 7813183 Program and erase methods for nonvolatile memory
US Patent 7813194 Apparatus and method for repairing a semiconductor memory
US Patent 7813201 Differential sense amplifier
US Patent 7813205 Semiconductor memory device
US Patent 7813209 Method for reducing power consumption in a volatile memory and related device
US Patent 7817481 Column selectable self-biasing virtual voltages for SRAM write assist
US Patent 7817490 Low-power operation of static memory in a read-only mode
US Patent 7821840 Multi-phase programming of multi-level memory
US Patent 7821856 Memory device having an evaluation circuit
US Patent 7826255 Variable write and read methods for resistive random access memory
US Patent 7826257 Magneto-resistance effect element and magnetic memory device
US Patent 7826262 Operation method of nitride-based flash memory and method of reducing coupling interference
US Patent 7830706 Semiconductor device
US Patent 7835172 System and method of operation for resistive change memory
US Patent 7835199 Nonvolatile memory using resistance material
US Patent 7839675 Magnetic memory device and method for reading magnetic memory cell using spin hall effect
US Patent 7839685 Soft errors handling in EEPROM devices
US Patent 7839696 Method of programming and erasing a p-channel BE-SONOS NAND flash memory
US Patent 7839697 Semiconductor memory device
US Patent 7839706 Dual mode accessing signal control apparatus and dual mode timing signal generating apparatus
US Patent 7848160 Semiconductor storage device and method for operating the same
US Patent 7848172 Memory circuit having reduced power consumption
US Patent 7852654 Semiconductor memory device, and multi-chip package and method of operating the same
US Patent 7852660 Enhancing read and write sense margins in a resistive sense element
US Patent 7852666 Nonvolatile memory using resistance material
US Patent 7852683 Correcting for over programming non-volatile storage
US Patent 7852701 Circuits for and methods of determining a period of time during which a device was without power
US Patent 7855908 Information storage devices using magnetic domain wall motion and methods of operating the same
US Patent 7855923 Write current compensation using word line boosting circuitry
US Patent 7859909 Nonvolatile semiconductor memory device
US Patent 7859910 Nonvolatile semiconductor memory device
US Patent 7864586 Non-volatile semiconductor memory device
US Patent 7864590 Non-volatile memory device and method of operating the same
US Patent 7864619 Write driver circuit for phase-change memory, memory including the same, and associated methods
US Patent 7864625 Optimizing SRAM performance over extended voltage or process range using self-timed calibration of local clock generator
US Patent 7869240 Semiconductor device and semiconductor memory tester
US Patent 7869281 Reading electronic memory utilizing relationships between cell state distributions
US Patent 7869283 Method for determining native threshold voltage of nonvolatile memory
US Patent 7872898 One time programmable read only memory and programming method thereof
US Patent 7872917 Non-volatile semiconductor memory device and memory system including the same
US Patent 7876602 Single-event upset immune static random access memory cell circuit, system, and method
US Patent 7876605 Phase change memory, phase change memory assembly, phase change memory cell, 2D phase change memory cell array, 3D phase change memory cell array and electronic component
US Patent 7876607 Reading threshold switching memory cells
US Patent 7881148 Semiconductor memory device
US Patent 7889537 Non-volatile memory device and method for writing data thereto
US Patent 7894232 Semiconductor device having user field and vendor field
US Patent 7894248 Programmable and redundant circuitry based on magnetic tunnel junction (MTJ)
US Patent 7894262 Nonvolatile semiconductor storage device having guaranteed and backup blocks
US Patent 7894270 Data restoration method for a non-volatile memory
US Patent 7898855 Systems and methods for reducing unauthorized data recovery from solid-state storage devices
US Patent 7903451 Storage apparatus including non-volatile SRAM
US Patent 7907465 Electrically programmable fuse bit
US Patent 7911842 Memory cell programming method and semiconductor device for simultaneously programming a plurality of memory block groups
US Patent 7916530 SCR matrix storage device
US Patent 7916547 Method for controlling a non-volatile semiconductor memory device
US Patent 7916558 Semiconductor memory device and method for reading/writing data thereof
US Patent 7916564 Multi-chip semiconductor device providing enhanced redundancy capabilities
US Patent 7924592 Semiconductor memory device having improved voltage transmission path and driving method thereof
US Patent 7924628 Operation of a non-volatile memory array
US Patent 7929334 In-situ resistance measurement for magnetic random access memory (MRAM)
US Patent 7929337 Phase-change random access memories capable of suppressing coupling noise during read-while-write operation
US Patent 7929359 Embedded DRAM with bias-independent capacitance
US Patent 7933133 Low cost, high-density rectifier matrix memory
US Patent 7936603 Purge operations for solid-state storage devices
US Patent 7936632 Semiconductor device including an internal circuit receiving two different power supply sources
US Patent 7940547 Resistive memory device for programming resistance conversion layers and method thereof
US Patent 7940570 Memory employing separate dynamic reference areas
US Patent 7940587 Semiconductor memory device and test method thereof
US Patent 7940599 Dual port memory device
US Patent 7944745 Flash memory array of floating gate-based non-volatile memory cells
US Patent 7944767 Semiconductor device and data processing system
US Patent 7948787 Semiconductor memory device
US Patent 7948792 Memory and techniques for using same
US Patent 7952907 Ferroelectric random access memory device
US Patent 7952917 Variable write and read methods for resistive random access memory
US Patent 7952925 Nonvolatile semiconductor memory device having protection function for each memory block
US Patent 7957178 Storage cell having buffer circuit for driving the bitline
US Patent 7957184 Magnetoresistive element and magnetoresistive random access memory including the same
US Patent 7961519 Memory employing independent dynamic reference areas
US Patent 7961530 Semiconductor device including nonvolatile memory
US Patent 7969800 Semiconductor memory apparatus
US Patent 7974121 Write current compensation using word line boosting circuitry
US Patent 7974141 Setting memory device VREF in a memory controller and memory device interface in a communication bus
US Patent 7978530 Correcting for over programming non-volatile storage
US Patent 7978538 Setting memory device termination in a memory device and memory controller interface in a communication bus
US Patent 7983081 Non-volatile memory apparatus and method with deep N-well
US Patent 7983109 Semiconductor device
US Patent 7995374 Semiconductor memory device, method of manufacturing the same, and method of screening the same
US Patent 7995400 Reducing effects of program disturb in a memory device
US Patent 8000127 Method for resetting a resistive change memory element
US Patent 8000142 Semi-volatile NAND flash memory
US Patent 8000155 Non-volatile memory device and method for writing data thereto
US Patent 8004877 Fault tolerant asynchronous circuits
US Patent 8004902 Nonvolatile semiconductor memory device
US Patent 8009457 Write current compensation using word line boosting circuitry
US Patent 8009487 System and method for mitigating reverse bias leakage
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US Patent 8009487 System and method for mitigating reverse bias leakage
Golden AI
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US Patent 8009457 Write current compensation using word line boosting circuitry
Golden AI
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US Patent 8004902 Nonvolatile semiconductor memory device
Golden AI
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US Patent 8004877 Fault tolerant asynchronous circuits
Golden AI
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US Patent 8000155 Non-volatile memory device and method for writing data thereto
Golden AI
edited on 8 Dec, 2021
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US Patent 8000142 Semi-volatile NAND flash memory
Golden AI
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US Patent 8000127 Method for resetting a resistive change memory element
Golden AI
edited on 8 Dec, 2021
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US Patent 7995400 Reducing effects of program disturb in a memory device
Golden AI
edited on 8 Dec, 2021
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US Patent 7995374 Semiconductor memory device, method of manufacturing the same, and method of screening the same
Golden AI
edited on 8 Dec, 2021
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US Patent 7983109 Semiconductor device
Golden AI
edited on 8 Dec, 2021
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US Patent 7983081 Non-volatile memory apparatus and method with deep N-well
Golden AI
edited on 8 Dec, 2021
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US Patent 7978538 Setting memory device termination in a memory device and memory controller interface in a communication bus
Golden AI
edited on 8 Dec, 2021
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US Patent 7978530 Correcting for over programming non-volatile storage
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 7974141 Setting memory device VREF in a memory controller and memory device interface in a communication bus
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 7974121 Write current compensation using word line boosting circuitry
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 7969800 Semiconductor memory apparatus
Golden AI
edited on 7 Dec, 2021
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Patent primary examiner of
US Patent 7961519 Memory employing independent dynamic reference areas
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