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US Patent 10084094 Wrapped source/drain contacts with enhanced area

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
Date Filed
March 17, 2017
Date of Patent
September 25, 2018
Patent Application Number
15462420
Patent Citations Received
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US Patent 12119346 Vertical field-effect transistor with wrap-around contact structure
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US Patent 11398480 Transistor having forked nanosheets with wraparound contacts
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US Patent 11869893 Stacked field effect transistor with wrap-around contacts
0
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US Patent 11508823 Low capacitance low RC wrap-around-contact
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US Patent 11521894 Partial wrap around top contact
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US Patent 10566246 Shared contact trench comprising dual silicide layers and dual epitaxial layers for source/drain layers of NFET and PFET devices
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US Patent 10693007 Wrapped contacts with enhanced area
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US Patent 11062960 Shared contact trench comprising dual silicide layers and dual epitaxial layers for source/drain layers of NFET and PFET devices
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US Patent 11764301 FinFET device and method of forming same
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US Patent 11764259 Vertical field-effect transistor with dielectric fin extension
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
10084094
Patent Primary Examiner
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Quoc Hoang

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