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US Patent 11205625 Wafer-level bonding of obstructive elements

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
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Date Filed
April 10, 2020
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Date of Patent
December 21, 2021
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Patent Application Number
16846177
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Patent Citations Received
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US Patent 12113056 Stacked dies and methods for forming bonded structures
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US Patent 12068278 Processed stacked dies
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US Patent 12074092 Hard IP blocks with physically bidirectional passageways
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US Patent 12113054 Non-volatile dynamic random access memory
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US Patent 11610846 Protective elements for bonded structures including an obstructive element
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US Patent 11621246 Diffused bitline replacement in stacked wafer memory
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US Patent 11694925 Diffusion barrier collar for interconnects
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US Patent 11760059 Method of room temperature covalent bonding
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US Patent 11790219 Three dimensional circuit implementing machine trained network
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US Patent 11791307 DBI to SI bonding for simplified handle wafer
•••
Patent Inventor Names
Javier A. DeLaCruz
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Rajesh Katkar
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
11205625
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Patent Primary Examiner
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Mamadou L Diallo
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