Patent attributes
A chip package structure is provided. The chip package structure includes a first redistribution structure having a first surface and a second surface opposite to the first surface. The chip package structure includes a first chip over the first surface. The chip package structure includes a first conductive bump connected between the first chip and the first redistribution structure. The chip package structure includes a first conductive pillar over the first surface and electrically connected to the first redistribution structure. The chip package structure includes a second chip over the second surface. The chip package structure includes a second conductive bump connected between the second chip and the first redistribution structure. The chip package structure includes a second conductive pillar over the second surface and electrically connected to the first redistribution structure.