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US Patent 11855216 Inner spacers for gate-all-around transistors

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
0
Date Filed
July 20, 2022
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Date of Patent
December 26, 2023
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Patent Application Number
17869163
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Patent Citations
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US Patent 9887269 Multi-gate device and method of fabrication thereof
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US Patent 9899398 Non-volatile memory device having nanocrystal floating gate and method of fabricating same
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US Patent 10032627 Method for forming stacked nanowire transistors
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US Patent 10109721 Horizontal gate-all-around device having wrapped-around source and drain
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US Patent 10157799 Multi-gate device and method of fabrication thereof
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US Patent 10290546 Threshold voltage adjustment for a gate-all-around semiconductor structure
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US Patent 10199502 Structure of S/D contact and method of making same
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US Patent 10516064 Multiple width nanosheet devices
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US Patent 8963258 FinFET with bottom SiGe layer in source/drain
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US Patent 9818872 Multi-gate device and method of fabrication thereof
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Patent Inventor Names
Chih-Hao Wang
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Shih-Cheng Chen
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Pei-Hsun Wang
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Zhi-Chang Lin
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Kuo-Cheng Chiang
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Lo-Heng Chang
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Jung-Hung Chang
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
11855216
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Patent Primary Examiner
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Shahed Ahmed
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CPC Code
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H01L 29/0653
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H01L 29/0673
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H01L 29/775
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H01L 29/0665
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H01L 2924/13061
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H01L 29/66439
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H01L 29/66469
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H01L 29/78687
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H01L 29/6653
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H01L 29/66553
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