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US Patent 12132004 Semiconductor devices and methods of manufacture

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
0
Date Filed
August 10, 2022
0
Date of Patent
October 29, 2024
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Patent Application Number
17818797
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Patent Citations
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US Patent 8829676 Interconnect structure for wafer level package
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US Patent 8877554 Packaged semiconductor devices, methods of packaging semiconductor devices, and PoP devices
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US Patent 9583420 Semiconductor device and method of manufactures
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US Patent 8680647 Packages with passive devices and methods of forming the same
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US Patent 8703542 Wafer-level packaging mechanisms
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US Patent 8759964 Wafer level package structure and fabrication methods
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US Patent 8778738 Packaged semiconductor devices and packaging devices and methods
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US Patent 8785299 Package with a fan-out structure and method of forming the same
0
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US Patent 8803306 Fan-out package structure and methods for forming the same
0
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US Patent 8809996 Package with passive devices and method of forming the same
0
•••
Patent Inventor Names
Pu Wang
0
Chih-Hao Chen
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Li-Hui Cheng
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Szu-Wei Lu
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
12132004
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Patent Primary Examiner
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Eliseo Ramos-Feliciano
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CPC Code
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H01L 25/16
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H01L 21/50
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H01L 21/56
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H01L 23/3114
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H01L 23/3121
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H01L 23/3142
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H01L 23/367
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H01L 2225/06513
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H01L 25/0652
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H01L 23/5389
0
•••

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