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US Patent 8476165 Method for thinning a bonding wafer

Patent 8476165 was granted and assigned to Tokyo Electron on July, 2013 by the United States Patent and Trademark Office.

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US Patent 12136605 Layer structures for making direct metal-to-metal bonds at low temperatures in microelectronics and method for forming the same
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US Patent 12132020 Low temperature bonded structures
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US Patent 12125784 Interconnect structures
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US Patent 12113056 Stacked dies and methods for forming bonded structures
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US Patent 12113054 Non-volatile dynamic random access memory
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US Patent 12074092 Hard IP blocks with physically bidirectional passageways
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US Patent 12068278 Processed stacked dies
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US Patent 12027487 Structures for low temperature bonding using nanoparticles
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US Patent 12009338 Dimension compensation control for directly bonded structures
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US Patent 11978724 Diffused bitline replacement in memory
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US Patent 11973056 Methods for low temperature bonding using nanoparticles
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Edits on 24 Apr, 2024
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