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Ajay K Arora
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Edits on 15 Dec, 2021
"Remove inverse infobox"
Golden AI
edited on 15 Dec, 2021
Edits made to:
Infobox
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-44
properties)
Infobox
Patent primary examiner of
US Patent 7812439 Semiconductor package with reduced length interconnect and manufacturing method thereof
US Patent 7816274 Methods for normalizing strain in a semiconductor device
US Patent 7829371 Image sensor and method for manufacturing the same
US Patent 7833910 Film substrate, fabrication method thereof, and image display substrate
US Patent 7834354 Pixel structure and method for manufacturing the same
US Patent 7843064 Structure and process for the formation of TSVs
US Patent 7859091 Manufacturing methods for semiconductor device with sealed cap
US Patent 7868379 Electronic device including a trench and a conductive structure therein
US Patent 7868406 Photodiode being monolithically integrated onto a waveguide
US Patent 7883917 Semiconductor device with bonding pad
US Patent 7884459 Semiconductor device suitable for a stacked structure
US Patent 7897500 Methods for forming silicide conductors using substrate masking
US Patent 7901960 Group III nitride substrate, epitaxial layer-provided substrate, methods of manufacturing the same, and method of manufacturing semiconductor device
US Patent 7901992 Die bonding agent and a semiconductor device made by using the same
US Patent 7902017 Process of forming an electronic device including a trench and a conductive structure therein
US Patent 7902034 Method of manufacturing SOI substrate and method of manufacturing semiconductor device
US Patent 7902069 Small area, robust silicon via structure and process
US Patent 7902089 N-type transistor, production methods for n-type transistor and n-type transistor-use channel, and production method of nanotube structure exhibiting n-type semiconductor-like characteristics
US Patent 7902645 Semiconductor device, semiconductor element, and substrate
US Patent 7902646 Multiphase synchronous buck converter
US Patent 7902647 TAB package connecting host device element
US Patent 7906815 Increased reliability for a contact structure to connect an active region with a polysilicon line
US Patent 7910403 Metal particles-dispersed composition and flip chip mounting process and bump-forming process using the same
US Patent 7915097 Electronic module with conductivity transformation region, method of manufacture and applications thereof
US Patent 7915728 Subassembly that includes a power semiconductor die and a heat sink having an exposed surface portion thereof
US Patent 7919767 Semiconductor memory device and fabrication method thereof
US Patent 7923737 Three-terminal switch array device, combined semiconductor device, and image forming apparatus
US Patent 7928442 Optical device having strained buried channel
US Patent 7928509 Integrated JFET and schottky diode
US Patent 7928589 Semiconductor device
US Patent 7932560 Method of fabricating a semiconductor on insulator device having a frontside substrate contact
US Patent 7939948 Interconnect structures with bond-pads and methods of forming bump sites on bond-pads
US Patent 7952143 Semiconductor device having IGBT and diode
US Patent 7952189 Hermetic packaging and method of manufacture and use therefore
US Patent 7969019 Module with stacked semiconductor devices
US Patent 7977162 Semiconductor device, method for the same, and heat radiator
US Patent 7986043 Integrated circuit package on package system
US Patent 7986049 Semiconductor device having multiple-layer hard mask with opposite stresses and method for fabricating the same
US Patent 7993975 Method of manufacturing semiconductor device including mounting and dicing chips
US Patent 7994064 Selective etch for damage at exfoliated surface
US Patent 7999368 Semiconductor package having ink-jet type dam and method of manufacturing the same
US Patent 8008154 Methods of forming impurity containing insulating films and flash memory devices including the same
US Patent 8008205 Methods for producing a semiconductor device having planarization films
US Patent 8008650 Transistor with nanotube structure exhibiting N-type semiconductor-like characteristics
Edits on 8 Dec, 2021
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
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+1
properties)
Infobox
Patent primary examiner of
US Patent 8008650 Transistor with nanotube structure exhibiting N-type semiconductor-like characteristics
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 8008205 Methods for producing a semiconductor device having planarization films
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 8008154 Methods of forming impurity containing insulating films and flash memory devices including the same
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7999368 Semiconductor package having ink-jet type dam and method of manufacturing the same
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7994064 Selective etch for damage at exfoliated surface
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7993975 Method of manufacturing semiconductor device including mounting and dicing chips
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7986043 Integrated circuit package on package system
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7986049 Semiconductor device having multiple-layer hard mask with opposite stresses and method for fabricating the same
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7977162 Semiconductor device, method for the same, and heat radiator
Edits on 8 Dec, 2021
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7969019 Module with stacked semiconductor devices
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7952189 Hermetic packaging and method of manufacture and use therefore
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7952143 Semiconductor device having IGBT and diode
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7939948 Interconnect structures with bond-pads and methods of forming bump sites on bond-pads
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7932560 Method of fabricating a semiconductor on insulator device having a frontside substrate contact
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7928589 Semiconductor device
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7928509 Integrated JFET and schottky diode
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7928442 Optical device having strained buried channel
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7923737 Three-terminal switch array device, combined semiconductor device, and image forming apparatus
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7919767 Semiconductor memory device and fabrication method thereof
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