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Lynne Gurley
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Edits on 14 Dec, 2021
"Remove inverse infobox"
Golden AI
edited on 14 Dec, 2021
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Patent primary examiner of
US Patent 7105388 Method of forming at least one interconnection to a source/drain region in silicon-on-insulator integrated circuitry
US Patent 7129160 Method for simultaneously removing multiple conductive materials from microelectronic substrates
US Patent 7288806 DRAM arrays
US Patent 7294894 Micromechanical cap structure and a corresponding production method
US Patent 7297981 Electro-optical device having a light-shielding film comprising alternating layers of silicide and nitrided silicide
US Patent 7298043 Semiconductor device
US Patent 7315048 Method and apparatus for mixing light emitted by a plurality of solid-state light emitters
US Patent 7315059 Semiconductor memory device and manufacturing method for the same
US Patent 7315067 Native high-voltage n-channel LDMOSFET in standard logic CMOS
US Patent 7323752 ESD protection circuit with floating diffusion regions
US Patent 7323760 Fuse structure for semiconductor integrated circuit with improved insulation film thickness uniformity and moisture resistance
US Patent 7329937 Asymmetric field effect transistors (FETs)
US Patent 7332408 Isolation trenches for memory devices
US Patent 7332433 Methods of modulating the work functions of film layers
US Patent 7332763 Selective coupling of voltage feeds for body bias voltage in an integrated circuit device
US Patent 7332776 Semiconductor device
US Patent 7332789 Isolation trenches for memory devices
US Patent 7335922 Radiation-emitting-and-receiving semiconductor chip and method for producing such a semiconductor chip
US Patent 7335958 Tailoring gate work-function in image sensors
US Patent 7339213 Semiconductor device having a triple gate transistor and method for manufacturing the same
US Patent 7339259 Semiconductor device
US Patent 7339835 Non-volatile memory structure and erase method with floating gate voltage control
US Patent 7341888 Balance filter packaging chip having balun mounted therein and manufacturing method thereof
US Patent 7342281 Electrostatic discharge protection circuit using triple welled silicon controlled rectifier
US Patent 7345312 Solid-state light source
US Patent 7345325 Avalanche photodiode
US Patent 7345340 Semiconductor integrated circuit and a semiconductor device
US Patent 7348630 Semiconductor device for high frequency uses and manufacturing method of the same
US Patent 7354832 Tri-gate device with conformal PVD workfunction metal on its three-dimensional body and fabrication method thereof
US Patent 7355202 Thin-film transistor
US Patent 7355265 Semiconductor integrated circuit
US Patent 7358585 Silicon-based Schottky barrier infrared optical detector
US Patent 7364924 Silicon phosphor electroluminescence device with nanotip electrode
US Patent 7368337 Semiconductor device and manufacturing method thereof
US Patent 7368786 Process insensitive ESD protection device
US Patent 7368819 Multilayer printed wiring board and multilayer printed circuit board
US Patent 7371641 Method of making a trench MOSFET with deposited oxide
US Patent 7372119 Cross-shaped Hall device having extensions with slits
US Patent 7374635 Forming method and forming system for insulation film
US Patent 7374989 Flash memory and methods of fabricating the same
US Patent 7378290 Isolation circuit
US Patent 7378317 Superjunction power MOSFET
US Patent 7378686 Light emitting diode and side emitting lens
US Patent 7418283 Adiabatic quantum computation with superconducting qubits
US Patent 7436011 CMOS image sensor
US Patent 7436077 Semiconductor device and method of manufacturing the same
US Patent 7456051 Photoelectric device grinding process and device grinding process
US Patent 7456052 Thermal intermediate apparatus, systems, and methods
US Patent 7468529 Porous UV-emitting semiconductor on porous substrate as sterilizing filter made by filtering suspended semiconductor particles
US Patent 7470960 High-voltage power semiconductor device with body regions of alternating conductivity and decreasing thickness
US Patent 7476966 Semiconductor module
US Patent 7482256 Semiconductor device and method of manufacturing the same
US Patent 7498656 Electromagnetic shielding structure
US Patent 7528469 Semiconductor equipment having multiple semiconductor devices and multiple lead frames
US Patent 7535016 Vertical carbon nanotube transistor integration
US Patent 7550845 Ball grid array package with separated stiffener layer
US Patent 7557442 Power semiconductor arrangement
US Patent 7573104 CMOS device on hybrid orientation substrate comprising equal mobility for perpendicular devices of each type
US Patent 7576388 Trench-gate LDMOS structures
US Patent 7590004 Nonvolatile semiconductor memory having a plurality of interconnect layers
US Patent 7592629 Gallium nitride thin film on sapphire substrate having reduced bending deformation
US Patent RE41477 Semiconductor device with a reduced mask count buried layer
US Patent 7781821 Parallel varactor capacitor with varying capacitance
US Patent 8008731 IGFET device having a RF capability
Edits on 8 Dec, 2021
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 8008731 IGFET device having a RF capability
Edits on 5 Dec, 2021
Golden AI
edited on 5 Dec, 2021
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+1
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Patent primary examiner of
US Patent 7781821 Parallel varactor capacitor with varying capacitance
Golden AI
edited on 5 Dec, 2021
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Patent primary examiner of
US Patent RE41477 Semiconductor device with a reduced mask count buried layer
Edits on 3 Dec, 2021
Golden AI
edited on 3 Dec, 2021
Edits made to:
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+1
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Patent primary examiner of
US Patent 7592629 Gallium nitride thin film on sapphire substrate having reduced bending deformation
Golden AI
edited on 3 Dec, 2021
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+1
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Patent primary examiner of
US Patent 7590004 Nonvolatile semiconductor memory having a plurality of interconnect layers
Edits on 2 Dec, 2021
Golden AI
edited on 2 Dec, 2021
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+1
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Patent primary examiner of
US Patent 7576388 Trench-gate LDMOS structures
Golden AI
edited on 2 Dec, 2021
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+1
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Patent primary examiner of
US Patent 7573104 CMOS device on hybrid orientation substrate comprising equal mobility for perpendicular devices of each type
Golden AI
edited on 2 Dec, 2021
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+1
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Patent primary examiner of
US Patent 7557442 Power semiconductor arrangement
Golden AI
edited on 2 Dec, 2021
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+1
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Patent primary examiner of
US Patent 7550845 Ball grid array package with separated stiffener layer
Golden AI
edited on 2 Dec, 2021
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+1
properties)
Infobox
Patent primary examiner of
US Patent 7535016 Vertical carbon nanotube transistor integration
Golden AI
edited on 2 Dec, 2021
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+1
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Infobox
Patent primary examiner of
US Patent 7528469 Semiconductor equipment having multiple semiconductor devices and multiple lead frames
Edits on 1 Dec, 2021
Golden AI
edited on 1 Dec, 2021
Edits made to:
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+1
properties)
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Patent primary examiner of
US Patent 7498656 Electromagnetic shielding structure
Golden AI
edited on 1 Dec, 2021
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+1
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Patent primary examiner of
US Patent 7482256 Semiconductor device and method of manufacturing the same
Golden AI
edited on 1 Dec, 2021
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+1
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Infobox
Patent primary examiner of
US Patent 7476966 Semiconductor module
Golden AI
edited on 1 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7470960 High-voltage power semiconductor device with body regions of alternating conductivity and decreasing thickness
Golden AI
edited on 1 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7468529 Porous UV-emitting semiconductor on porous substrate as sterilizing filter made by filtering suspended semiconductor particles
Golden AI
edited on 1 Dec, 2021
Edits made to:
Infobox
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+1
properties)
Infobox
Patent primary examiner of
US Patent 7456052 Thermal intermediate apparatus, systems, and methods
Golden AI
edited on 1 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7456051 Photoelectric device grinding process and device grinding process
Golden AI
edited on 1 Dec, 2021
Edits made to:
Infobox
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+1
properties)
Infobox
Patent primary examiner of
US Patent 7436077 Semiconductor device and method of manufacturing the same
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