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Tan V. Mai

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Edits on 14 Dec, 2021
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edited on 14 Dec, 2021
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Patent primary examiner of
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US Patent 7089276 Modular Galois-field subfield-power integrated inverter-multiplier circuit for Galois-field division over GF(256)
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US Patent 7092980 Programming architecture for a programmable analog system
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US Patent 7092981 Non-reciprocal network element that produces an input impedance that is a function of the multiplication-division of its load impedances
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US Patent 7096242 Random number generator and generation method
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US Patent 7096246 Arithmetic unit for multiplying a first quantity X by a second quantity Y
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US Patent 7099906 Random bit sequence generator
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US Patent 7099909 Merge and split fast fourier block transform method
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US Patent 7103620 Method and apparatus for verification of digital arithmetic circuits by means of an equivalence comparison
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US Patent 7103623 Partitioned block frequency domain adaptive filter
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US Patent 7107301 Method and apparatus for reducing latency in a digital signal processing device
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US Patent 7107303 Sparse echo canceller
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US Patent 7107304 Single-channel convolution in a vector processing computer system
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US Patent 7107306 Method and apparatus for adaptive real-time signal conditioning, processing, analysis, quantification, comparision, and control
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US Patent 7111027 Method for automatically adding scale symbol to operation formula during operation and system executing the method
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US Patent 7111028 Data conversion method, a data conversion circuit and a data conversion program
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US Patent 7111030 Method of detecting pilot tones in a noisy signal
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US Patent 7111031 Dual processor having a function calculating the sum of the results of a plurality of arithmetic operations
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US Patent 7111033 Carry save adders
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US Patent 7113966 Method and apparatus for decorrelating a random number generator using a pseudo-random sequence
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US Patent 7117233 Random number generator and method for generating a random number
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US Patent 7117235 Digital decimation filter having finite impulse response (FIR) decimation stages
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US Patent 7117236 Parallel adder-based DCT/IDCT design using cyclic convolution
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US Patent 7117237 Information processing system, encryption/decryption system, system LSI, and electronic equipment
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US Patent 7117238 Method and system for performing pipelined reciprocal and reciprocal square root operations
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US Patent 7120656 Movable tap finite impulse response filter
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US Patent 7120657 System and method for adaptive filtering
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US Patent 7120658 Digital systolic array architecture and method for computing the discrete Fourier transform
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US Patent 7120660 Method of and apparatus for modular multiplication
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US Patent 7124157 Random number generator
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US Patent 7124162 Adder tree structure digital signal processor system and method
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US Patent 7127481 Movable tap finite impulse response filter
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US Patent 7127482 Performance optimized approach for efficient downsampling operations
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US Patent 7127483 Method and system of a microprocessor subtraction-division floating point divider
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US Patent 7133887 Detection and identification of stable PRI patterns using multiple parallel hypothesis correlation algorithms
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US Patent 7133890 Total order comparator unit for comparing values of two floating point operands
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US Patent 7136891 Arithmetic and relational operations
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US Patent 7136893 Decimal multiplication using digit recoding
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US Patent 7139789 Adder increment circuit
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US Patent 7146393 Scaling method by using cubic-like triple point slop control (CTPSC)
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US Patent 7146394 Watermark detection
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US Patent 7146395 Banyan switched processor datapath
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US Patent 7146396 Method and apparatus of convolving signals
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US Patent 7149765 Apparatus and method for precision binary numbers and numerical operations
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US Patent 7149766 Methods for detecting overflow and/or underflow in a fixed length binary field
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US Patent 7149768 3-input arithmetic logic unit
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US Patent 7152085 Non-phase shifting bidimensional filter
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US Patent 7152089 Parallel prefix networks that make tradeoffs between logic levels, fanout and wiring racks
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US Patent 7155469 Method of correcting physical impairments of a programmable filter
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US Patent 7155470 Variable gain integrator
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US Patent 7155472 Fixed-point quantizer for video coding
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US Patent 7155473 High-speed parallel-prefix modulo 2n-1 adders
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US Patent 7155474 Current-mode multi-valued full adder in semiconductor device
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US Patent 7159004 Adder, multiplier and integrated circuit
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US Patent 7167882 True random number generation
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US Patent 7167885 Emod a fast modulus calculation for computer systems
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US Patent 7167886 Method for constructing logic circuits of small depth and complexity for operation of inversion in finite fields of characteristic 2
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US Patent 7174357 Circuitry for carrying out division and/or square root operations requiring a plurality of iterations
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US Patent 7177888 Programmable random bit source
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US Patent 7177895 Linear channel select filter
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US Patent 7181484 Extended-precision accumulation of multiplier output
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US Patent 7185035 Arithmetic structures for programmable logic devices
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US Patent 7185042 High speed, universal polarity full adder which consumes minimal power and minimal area
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US Patent 7185043 Adder including generate and propagate bits corresponding to multiple columns
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US Patent 7188131 Random number generator
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US Patent 7188135 Analog adaptive FIR filter having independent coefficient sets for each filter tap
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US Patent 7191200 Method and apparatus for binary number conversion
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US Patent 7191202 Comparator unit for comparing values of floating point operands
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US Patent 7191204 Computing system using newton-raphson method
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US Patent 7194497 Hardware-based accelerator for time-domain scientific computing
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US Patent 7194499 Pipelined divider and dividing method with small lookup table
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US Patent 7194501 Complementary pass gate logic implementation of 64-bit arithmetic logic unit using propagate, generate, and kill
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US Patent 7197525 Method and system for fixed point fast fourier transform with improved SNR
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US Patent 7197527 Efficient arithmetic in finite fields of odd characteristic on binary hardware
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US Patent 7197528 Jacobian group element adder
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US Patent 7200629 Apparatus and method for Fast Hadamard Transforms
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US Patent 7203715 Method and relative quantum gate for running a Grover's or a Deutsch-Jozsa's quantum algorithm
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US Patent 7203717 Fast modified discrete cosine transform method
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US Patent 7209936 Frequency locked digitally tuned oscillator synthesizer
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US Patent 7209938 Kalman filter with adaptive measurement variance estimator
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US Patent 7209940 Temperature compensated square function generator
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US Patent 7213042 Digital IF processing block having finite impulse response (FIR) decimation stages
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US Patent 7219116 Data processing apparatus
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US Patent 7219117 Methods and systems for computing floating-point intervals
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US Patent 7219118 SIMD addition circuit
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US Patent 7225212 Extended precision accumulator
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US Patent 7225215 Adaptive filter employing adaptively controlled forgetting factor and adaptively controlling method of forgetting factor
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US Patent 7225218 Apparatus and methods for generating counts from base values
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US Patent 7228323 HIS data compression
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US Patent 7228324 Circuit for selectively providing maximum or minimum of a pair of floating point operands
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US Patent 7236995 Data processing apparatus and method for converting a number between fixed-point and floating-point representations
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US Patent 7236997 Filter processing apparatus and method
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US Patent 7236999 Methods and systems for computing the quotient of floating-point intervals
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US Patent 7240083 Precision complex sinusoid generation using limited processing
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US Patent 7243119 Floating point computing unit
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US Patent 7246143 Traced fast fourier transform apparatus and method
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US Patent 7254599 Average code generation circuit
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US Patent 7260593 Device for determining the rank of a sample, an apparatus for determining the rank of a plurality of samples, and the i
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US Patent 7263541 Multi-dimensional hybrid and transpose form finite impulse response filters
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US Patent 7266578 Method and hardware for computing reciprocal square root and program for the same
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US Patent 7266579 Combined polynomial and natural multiplier architecture
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US Patent 7266580 Modular binary multiplier for signed and unsigned operands of variable widths
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US Patent 7269614 Secure hardware random number generator
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US Patent 7277907 Method of setting a transfer function of an adaptive filter
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US Patent 7284024 Quantum noise random number generator
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US Patent 7284027 Method and apparatus for high speed calculation of non-linear functions and networks using non-linear function calculations for digital signal processing
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US Patent 7287050 Parametric recursive digital filter
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US Patent 7290021 Method and apparatus for parallel signal processing
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US Patent 7293053 Digital random generator based on an arithmetic compressor
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US Patent 7293055 Flexible adaptation engine for adaptive transversal filters
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US Patent 7293057 Method and apparatus for cancelling inter-symbol interference (ISI) within a communication channel
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US Patent 7296046 Mobile terminal provided with positioning system and method of positioning
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US Patent 7302456 Stochastic processor and stochastic computer using the same
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US Patent 7302459 Method and apparatus for digital sample rate conversion
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US Patent 7308469 Method for generating secure elliptic curves using an arithmetic-geometric mean iteration
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US Patent 7308470 Smaller and lower power static mux circuitry in generating multiplier partial product signals
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US Patent 7308471 Method and device for performing operations involving multiplication of selectively partitioned binary inputs using booth encoding
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US Patent 7310656 Grounded emitter logarithmic circuit
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US Patent 7313586 Adder-subtracter circuit
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US Patent 7315878 Fast Fourier transform device
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US Patent 7318079 Method and device for filtering a video signal
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US Patent 7318080 Split radix multiplication
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US Patent 7318081 Band-pass filter and tracking signal processor circuit
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US Patent 7320014 Method and apparatus for identifying similar events in long data records
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US Patent 7320015 Circuit and method for performing multiple modulo mathematic operations
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US Patent 7325020 Input and evaluation of fractions using a calculator
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US Patent 7325023 Method of making a window type decision based on MDCT data in audio encoding
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US Patent 7325025 Look-ahead carry adder circuit
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US Patent 7328227 Low power vector summation apparatus
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US Patent 7328230 SIMD four-data element average instruction
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US Patent 7330864 System and method for using native floating point microprocessor instructions to manipulate 16-bit floating point data representations
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US Patent 7330865 Digital filter and its designing method
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US Patent 7330868 Data input apparatus and method
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US Patent 7330869 Hybrid arithmetic logic unit
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US Patent 7334008 Quantum gate for carrying out a grover's quantum algorithm and a relative method of performing the interference operation of a grover's quantum algorithm
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US Patent 7334012 Reverse division process
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US Patent 7346637 Polynomial time deterministic method for testing primality of numbers
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US Patent 7346638 Filtering, equalization, and power estimation for enabling higher speed signal transmission
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US Patent 7346639 Method and apparatus for suppressing limit cycles in noise shaping filters
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US Patent 7346642 Arithmetic processor utilizing multi-table look up to obtain reciprocal operands
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US Patent 7346645 Architecture for transverse-form analog finite-impulse-response filter
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US Patent 7349932 High performance FIR filter
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US Patent 7349936 Interpolation method, apparatus for carrying out the method, and control program for implementing the method
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US Patent 7349938 Arithmetic circuit with balanced logic levels for low-power operation
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US Patent 7349939 Processor, a circuit and a method for processing images in a parallel processor network
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US Patent 7353243 Reconfigurable filter node for an adaptive computing machine
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US Patent 7353244 Dual-multiply-accumulator operation optimized for even and odd multisample calculations
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US Patent 7359928 Hardware quantum gate
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US Patent 7359929 Fast solution of integral equations representing wave propagation
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US Patent 7363336 Six-term Karatsuba-variant calculator
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US Patent 7363337 Floating point divider with embedded status information
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US Patent 11182458 Three-dimensional lane predication for matrix operations
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US Patent 11182668 Neural network architecture using convolution engine filter weight buffers
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US Patent 7366745 High-speed function approximation
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US Patent 7366746 Finite impulse response filter method and apparatus
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US Patent 7366747 Digital filter circuit and data processing method
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US Patent 7366749 Floating point adder with embedded status information
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US Patent 7373370 Extendable squarer and operation method for processing digital signals
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US Patent 7376686 Apparatus and method for generating packed sum of absolute differences
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US Patent 7376690 Time discrete filter comprising upsampling, sampling rate conversion and downsampling stages
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US Patent 7376691 Arithmetic and logic unit using half adder
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US Patent 7379956 Encoding and decoding data arrays
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US Patent 7379957 Method and apparatus of demodulating square root for processing digital signals
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US Patent 7389317 Long instruction word controlling plural independent processor operations
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US Patent 7392272 Calculation device and calculation method
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US Patent 7392276 Efficient multiplication sequence for large integer operands wider than the multiplier hardware
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US Patent 7395288 Seed generating circuit, random number generating circuit, semiconductor integrated circuit, IC card, and information terminal equipment
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US Patent 7395289 Frequency synthesizing and back-end processing circuit and method thereof
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US Patent 7395290 Digital filter and method thereof using frequency translations
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US Patent 7395291 Multiplierless correlators for HIPERLAN/2 and IEEE 802.11A wireless local area networks
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US Patent 7395295 Pipeline core in Montgomery multiplier
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US Patent 7395296 Circuitry and method for performing non-arithmetic operations
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US Patent 7395297 Floating point system that represents status flag information within a floating point operand
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US Patent 7395299 System and method for efficient hardware implementation of a perfect precision blending function
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US Patent 7395300 System, and method for calculating product of constant and mixed number power of two
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US Patent 7395301 Method and process for determining a quotient
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US Patent 7395303 Method and device for comparing binary data words
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US Patent 7395305 Method and relative circuit for incrementing, decrementing or two's complementing a bit string
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US Patent 7395306 Fast add rotate add operation
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US Patent 7395308 Grounded emitter logarithmic circuit
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US Patent 7398288 Efficient implementation of a filter
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US Patent 7401110 System, method and apparatus for an improved MD5 hash algorithm
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US Patent 7403962 Interpolation filter design and application
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US Patent 7403965 Encryption/decryption system for calculating effective lower bits of a parameter for Montgomery modular multiplication
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US Patent 7406493 Up-sampling half-band reconstruction filtering
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US Patent 7406495 Adder structure with midcycle latch for power reduction
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US Patent 7409415 Processor system with efficient shift operations including EXTRACT operation
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US Patent 7409417 Polyphase filter with optimized silicon area
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US Patent 7409418 Linearly scalable finite impulse response filter
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US Patent 7412471 Discrete filter having a tap selection circuit
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US Patent 7412473 Arithmetic circuitry for averaging and methods thereof
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US Patent 7415495 Selective filter having linear phase
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US Patent 7418469 Method and apparatus for adaptive real-time signal conditioning, processing, analysis, quantification, comparison, and control
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US Patent 7421463 Random sequence generating apparatus, encryption/decryption apparatus, random sequence generating method, encryption/decryption method and program
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US Patent 7421464 System and method for introducing dither for reducing spurs in digital-to-time converter direct digital synthesis
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US Patent 7424501 Nonlinear filtering and deblocking applications utilizing SIMD sign and absolute value operations
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US Patent 7424503 Pipelined accumulators
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US Patent 7424504 Arithmetic processor for accomodating different field sizes
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US Patent 7424505 Method and apparatus for performing multiply-add operations on packed data
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US Patent 7424507 High speed, low power, pipelined zero crossing detector that utilizes carry save adders
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US Patent 7424508 Self-timed carry look-ahead adder and summation method thereof
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US Patent 7426527 Random number generator and method for generating a random number
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US Patent 7426529 Processor and method for a simultaneous execution of a calculation and a copying process
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US Patent 7428561 Apparatus and method for scaling digital data information
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US Patent 7428563 Apparatus and method for selectively performing Fast Hadamard Transform or Fast Fourier Transform
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US Patent 7428564 Pipelined FFT processor with memory address interleaving
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US Patent 7428567 Arithmetic unit for addition or subtraction with preliminary saturation detection
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US Patent 7430575 One-dimensional fourier transform program, method and apparatus
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US Patent 7430577 Computationally efficient mathematical engine
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US Patent 7433905 Device and method for processing digital values in particular in non-adjacent form
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US Patent 7433909 Processing architecture for a reconfigurable arithmetic node
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US Patent 7437391 Numerically controlled oscillator and method of operation
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US Patent 7437395 FFT operating apparatus of programmable processors and operation method thereof
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US Patent 7437398 Pattern matching architecture
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US Patent 7437399 Method and apparatus for averaging parity protected binary numbers
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US Patent 7437402 Low-power, high-speed word comparator
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US Patent 7444367 Floating point status information accumulation circuit
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US Patent 7447719 Quantum computing method and quantum computer
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US Patent 7447720 Method for finding global extrema of a set of bytes distributed across an array of parallel processing elements
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US Patent 7451171 Systems, methods and computer program products for hardware assists for microcoded floating point divide and square root
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US Patent 7451174 Multi-level soft detector-quantizer
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US Patent 7454451 Method for finding local extrema of a set of values for a parallel processing element
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US Patent 7457838 Methods and apparatus for performing calculations using reduced-width data
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US Patent 7461108 Barrel shift device
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US Patent 7464128 Methods and apparatus for single stage Galois field operations
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US Patent 7464130 Logic circuit and method for performing AES MixColumn transform
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US Patent 7464131 Logical calculation circuit, logical calculation device, and logical calculation method
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US Patent 7467176 Saturation and rounding in multiply-accumulate blocks
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US Patent 7472147 Random number string output apparatus, random number string output method, program, and information recording medium
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US Patent 7475100 Calculating device capable of displaying constants and method thereof
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US Patent 7475102 Random number generation method based on multivariate non-normal distribution, parameter estimation method thereof, and application to simulation of financial field and semiconductor ion implantation
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US Patent 7475105 One bit full adder with sum and carry outputs capable of independent functionalities
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US Patent 7480685 Apparatus and method for generating packed sum of absolute differences
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US Patent 7483932 Method and system for computing multidimensional fast Fourier transforms
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US Patent 7483933 Correlation architecture for use in software-defined radio systems
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US Patent 7483935 System and method to implement a matrix multiply unit of a broadband processor
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US Patent 7483937 Parallel processing method for inverse matrix for shared memory type scalar parallel computer
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US Patent 7487193 Fast video codec transform implementations
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US Patent 7487196 Methods and apparatus for implementing a saturating multiplier
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US Patent 7490119 High speed adder design for a multiply-add based floating point unit
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US Patent 7490121 Modular binary multiplier for signed and unsigned operands of variable widths
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US Patent 7493353 Stochastic processor, driving method thereof, and recognition process device using the same
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US Patent 7493356 Device and method for cryptoprocessor
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US Patent 7493357 Random carry-in for floating-point operations
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US Patent 7496617 Tamper proof generation of true random numbers
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US Patent 7496618 System and method for a fast fourier transform architecture in a multicarrier transceiver
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US Patent 7496619 System and methods of nonuniform data sampling and data reconstruction in shift invariant and wavelet spaces
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US Patent 7496620 Calculation apparatus
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US Patent 7499963 Complex filter with higher order pole
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US Patent 7502816 Signal-processing apparatus and method
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US Patent 7506016 Multiplier device
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US Patent 7506017 Verifiable multimode multipliers
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US Patent 7509361 Method and apparatus for generating random numbers for use in a field programmable gate array
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US Patent 7509362 Non-linear function approximation using finite order polynomial in fixed-point arithmetic
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US Patent 7509363 Method and system for approximating sine and cosine functions
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US Patent 7509367 Method and apparatus for performing multiply-add operations on packed data
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US Patent 7512645 System and method for generating pseudorandom numbers
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US Patent 7512646 Precision complex sinusoid generation using limited processing
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US Patent 7516173 Carry-skip adder having merged carry-skip cells with sum cells
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US Patent 11188115 Sequence signal generator and sequence signal generation method
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US Patent 11188303 Floating point multiply hardware using decomposed component numbers
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US Patent 11188328 Compute array of a processor with mixed-precision numerical linear algebra support
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US Patent 11188842 Methods for obtaining solutions to multiproduct formulas
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US Patent 7519641 Method and apparatus for generating true random numbers by way of a quantum optics process
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US Patent 7519644 Finite field serial-serial multiplication/reduction structure and method
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US Patent 7519646 Reconfigurable SIMD vector processing system
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US Patent 7523150 Binary representation of number based on processor word size
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US Patent 7523152 Methods for supporting extended precision integer divide macroinstructions in a processor
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US Patent 7523154 Write compensation circuit and signal interpolation circuit of recording device
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US Patent 7529789 Method for representing complex numbers in a communication system
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US Patent 7533139 Method and system for multithread processing of spreadsheet chain calculations
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US Patent 7536431 Vector-matrix multiplication
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US Patent 7539715 Method and system for saturating a left shift result using a standard shifter
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US Patent 7539717 Logarithm processing systems and methods
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US Patent 7539720 Low latency integer divider and integration with floating point divider and method
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US Patent 7539721 Analog filter with passive components for discrete time signals
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US Patent 7543007 Residue-based error detection for a shift operation
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US Patent 7543010 Modular pipeline fast Fourier transform
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US Patent 7543013 Multi-stage floating-point accumulator
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US Patent 7543014 Saturated arithmetic in a processing unit
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US Patent 7546327 Platform independent randomness accumulator for network applications
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US Patent 7546328 Decimal floating-point adder
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US Patent 7546329 Systems for performing multiplication operations on operands representing complex numbers
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US Patent 7546330 Systems for performing multiply-accumulate operations on operands representing complex numbers
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US Patent 7546332 Apparatus and methods for implementation of mathematical functions
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US Patent 7548942 Base four processor
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US Patent 7552161 Multi-stream FFT for MIMO-OFDM systems
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US Patent 7552164 Accelerated prime sieving using architecture-optimized partial prime product table
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US Patent 7555507 Apparatus for solving differential equations
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US Patent 7555508 Methods and apparatus for performing calculations using reduced-width data
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US Patent 7555512 RAM-based fast fourier transform unit for wireless communications
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US Patent 7562107 Mixed-type adder comprising multiple sub-adders having different carry propagation schemes
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US Patent 7562108 High bandwidth high gain receiver equalizer
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US Patent 7565387 Systems and methods for configuring a programmable logic device to perform a computation using carry chains
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US Patent 7565392 Single-level parallel-gated carry/majority circuits and systems therefrom
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US Patent 7565393 Discrete time filter having gain for digital sampling receivers
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US Patent 7567996 Vector SIMD processor
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US Patent 7567998 Method and system for multiplier optimization
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US Patent 7571198 Dynamically reconfigurable processor and processor control program for controlling the same
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US Patent 7571201 Method for distributed joint pseudo random decision making
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US Patent 7574470 Multimedia data processing method
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US Patent 7577699 Apparatus and method for reducing precision of data
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US Patent 7580963 Semiconductor device having an arithmetic unit of a reconfigurable circuit configuration in accordance with stored configuration data and a memory storing fixed value data to be supplied to the arithmetic unit, requiring no data area for storing fixed value data to be set in a configuration memory
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US Patent 7580964 Hardware-efficient phase-to-amplitude mapping design for direct digital frequency synthesizers
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US Patent 7584234 Method and apparatus for narrow to very wide instruction generation for arithmetic circuitry
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US Patent 7584236 Movable tap finite impulse response filter
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US Patent 7584237 Fast hardware divider
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US Patent 7584238 Analog circuit system for generating elliptic functions
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US Patent 7587438 DSP processor architecture with write datapath word conditioning and analysis
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US Patent 7587445 Complex multiplex feedback filter
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US Patent 7590674 Method and apparatus for generating a random bit stream
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US Patent 7590676 Programmable logic device with specialized multiplier blocks
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US Patent 7596589 Time-mode analog computation circuits and methods
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US Patent 7599980 Efficient hardware square-root operation
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US Patent 7599982 Efficient hardware divide operation
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US Patent 7603401 Method and system for on-line blind source separation
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US Patent 7610323 Method and apparatus for initializing interval computations through subdomain sampling
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US Patent 7610324 System for detection and estimation of periodic patterns in a noisy signal
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US Patent 7610325 System(s), method(s), and apparatus for detecting end of slice groups in a bitstream
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US Patent 7610326 Arithmetic circuit for calculating a cumulative value as a result of parallel arithmetic processing
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US Patent 7613755 Signature searching system
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US Patent 7613757 System and method for parallel PN generation
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US Patent 7613759 Low-complexity nonlinear filters
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US Patent 7613764 Methods for quantum processing
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US Patent 7613765 Bus architecture for quantum processing
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US Patent 7617266 Nonlinear conversion system using precision mapping and the method thereof
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US Patent 7617268 Method and apparatus supporting non-additive calculations in graphics accelerators and digital signal processors
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US Patent 7617270 Method and apparatus for adaptive real-time signal conditioning, processing, analysis, quantification, comparison, and control
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US Patent 7620672 Method for performing classical Bayesian net calculations using a quantum computer
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US Patent 7620674 Method and apparatus for enhanced estimation of an analyte property through multiple region transformation
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US Patent 7620676 Lookup table and data acquisition method
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US Patent 7631028 Statistical control of adaptive ocular filter stability
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US Patent 7634523 Random number generators
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US Patent 7634527 Reciprocal estimate computation methods and apparatus
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US Patent 7640283 Shared Haar wavelet transform
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US Patent 7647368 Data processing apparatus and method for performing data processing operations on floating point data elements
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US Patent 7650372 Method and apparatus for varying-radix numeration system
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US Patent 7653678 Direct digital synthesis circuit
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US Patent 7657588 Detection and identification of stable PRI patterns using multiple parallel hypothesis correlation algorithms
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US Patent 7657589 System and method for generating a fixed point approximation to nonlinear functions
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US Patent 7664807 Apparatus for providing a random bit stream
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US Patent 7664808 Efficient real-time computation of FIR filter coefficients
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US Patent 7664809 Method and device for calculating modulo operations
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US Patent 7664811 Apparatus using sampling capacitors
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US Patent 7668898 Calculating circuit and method for computing an
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US Patent 7672988 Arithmetic processing device with invalid input keystroke recognition and menu return function
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US Patent 7672990 Digital computation method involving euclidean division
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US Patent 7676530 Duration minimum and maximum circuit for performance counter
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US Patent 7676531 Methods and apparatus for random number generation
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US Patent 7676532 Processing system and method for transform
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US Patent 7676535 Enhanced floating-point unit for extended functions
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US Patent 7676536 Efficiently determining a floor for a floating-point number
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US Patent 7676537 Address generation method for combining multiple selection results
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US Patent 7680868 PCR elbow determination by use of a double sigmoid function curve fit with the Levenburg-Marquardt algorithm and normalization
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US Patent 7685216 Automatic input error recovery circuit and method for recursive digital filters
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US Patent 7685219 Parallel systolic CORDIC algorithm with reduced latency for unitary transform of complex matrices and application to MIMO detection
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US Patent 7685220 Circular fast fourier transform
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US Patent 7689642 Efficient accuracy check for Newton-Raphson divide and square-root operations
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US Patent 7693921 Reducing computational complexity in determining the distance from each of a set of input points to each of a set of fixed points
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US Patent 7693923 Digital filter system whose stopband roots lie on unit circle of complex plane and associated method
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US Patent 7693926 Modular multiplication acceleration circuit and method for data encryption/decryption
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US Patent 7702701 Low-power random bit generator using thermal noise and method thereof
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US Patent 7702703 Determination apparatus and determination method
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US Patent 7702707 Waveform generation
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US Patent 7702710 Digital signal processor optimized for interpolation and decimation
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US Patent 7702715 Division arithmatic unit of variable radix
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US Patent 7702716 Analogue multiplier
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US Patent 7711765 Method and apparatus to perform multiply-and-accumulate operations
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US Patent 7720899 Arithmetic operation unit, information processing apparatus and arithmetic operation method
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US Patent 7720900 Fused multiply add split for multiple precision arithmetic
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US Patent 7720901 Multiplier operable to perform a variety of operations
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US Patent 7720902 Methods and apparatus for providing a reduction array
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US Patent 7725514 Liquid and plate-based random number generator
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US Patent 7725520 Processor
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US Patent 7734673 Control device optimizing computing input sample of data with discrete fourier transform algorithm
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US Patent 7739321 Method and adaptive filter for processing a sequence of input data
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US Patent 7739323 Systems, methods and computer program products for providing a combined moduli-9 and 3 residue generator
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US Patent 7739324 Timing driven synthesis of sum-of-product functional blocks
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US Patent 7747669 Rounding of binary integers
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US Patent 7752247 Random number generator and generation method
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US Patent 7761494 Receiving module and receiver having the same
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US Patent 7765250 Data processor with internal memory structure for processing stream data
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US Patent 7765251 Signal averaging circuit and method for sample averaging
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US Patent 7774394 Exponentiated polyphase digital filter
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US Patent 7774395 Digital filter for transmission-end pulse shaping
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US Patent 7783690 Electronic circuit for implementing a permutation operation
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US Patent 7783691 Sharing of a logic operator having a work register
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US Patent 7788308 Frequency float method and system for realizing a signal filter
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US Patent 7788312 Apparatus and method for reducing errors in analog circuits while processing signals
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US Patent 7797360 Sortable floating point numbers
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US Patent 7797366 Power-efficient sign extension for booth multiplication methods and systems
‌
US Patent 7809782 Method and system for selecting a set of parameters
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US Patent 7809783 Booth multiplier with enhanced reduction tree circuitry
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US Patent 7814136 Programmable logic systems and methods employing configurable floating point units
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US Patent 7822798 Dead reckoning for coordinate conversion
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US Patent 7822799 Adder-rounder circuitry for specialized processing block in programmable logic device
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US Patent 7827224 Movable tap finite impulse response filter
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US Patent 7827225 Methods and systems for a multi-channel Fast Fourier Transform (FFT)
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US Patent 7827226 Hybrid arithmetic logic unit
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US Patent 7831645 Digital resonant shelf filter
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US Patent 7831646 Movable tap finite impulse response filter
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US Patent 7831647 Movable tap finite impulse response filter
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US Patent 7831649 Method for transforming data by look-up table
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US Patent 7831650 Method for modular multiplication
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US Patent 7836114 Apparatus for generating ranging binary code sequence at high-speed, and method thereof
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US Patent 7840621 Electronic apparatus and its control program
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US Patent 7840623 Interpolator and designing method thereof
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US Patent 7840625 Methods for performing fast discrete curvelet transforms of data
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US Patent 7840628 Combining circuitry
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US Patent 7844649 Optical-based, self-authenticating quantum random number generators
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US Patent 7844652 Efficient computation of sketches
‌
US Patent 7844655 System, method and apparatus for multiplying large numbers in a single iteration using graphs
‌
US Patent 7844656 Systems, methods and apparatus for factoring numbers
‌
US Patent 7849121 Optical-based, self-authenticating quantum random number generators
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US Patent 7849122 Self-authenticating quantum random bit generators
‌
US Patent 7853635 Modular binary multiplier for signed and unsigned operands of variable widths
‌
US Patent 7860910 System and method for mapping mathematical finite floating-point numbers
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US Patent 7860911 Extended precision accumulator
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US Patent 7865543 Offset compensation for rail-to-rail avereraging circuit
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US Patent 7870179 Apparatus and method for optimal implementation of the CORDIC algorithm for wireless RFIC digital down-conversion
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US Patent 7873686 Complex half-band finite impulse response filter and method of making same
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US Patent 7877428 Processor system including processor and coprocessor
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US Patent 7877429 Movable tap finite impulse response filter
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US Patent 7882163 Electronic abacus and operation method of the electronic abacus
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US Patent 7882164 Image convolution engine optimized for use in programmable gate arrays
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US Patent 7885990 Random telegraph signal noise as a source for random numbers
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US Patent 7885991 Digital filter having a fir filter and a warped fir filter, and a listening device including such a digital filter
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US Patent 7890558 Apparatus and method for precision binary numbers and numerical operations
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US Patent 7895252 Single-channel convolution in a vector processing computer system
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US Patent 7895254 Eigenvalue decomposition and singular value decomposition of matrices using Jacobi rotation
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US Patent 7899852 Systems, methods, and apparatus for quasi-adiabatic quantum computation
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US Patent 7899855 Method, apparatus and instructions for parallel data conversions
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US Patent 7899857 CPU datapipe architecture with crosspoint switch
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US Patent 7899858 Filter circuit
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US Patent 7904496 Method and system for selecting effective tap values for a digital filter
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US Patent 7908307 Filter bank and method for improving efficiency thereof
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US Patent 7912881 Data compression method
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US Patent 7912883 Exponent processing systems and methods
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US Patent 7917561 Partially complex modulated filter bank
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US Patent 7917563 Read channel processor
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US Patent 7917564 Device and method for processing a signal having a sequence of discrete values
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US Patent 7917566 Arithmetic device capable of obtaining high-accuracy calculation results
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US Patent 7930331 Encipherment of digital sequences by reversible transposition methods
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US Patent 7930332 Weighted entropy pool service
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US Patent 7930333 High-speed, true random-number generator
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US Patent 7930334 Gain control coding within proportional-integral-derivative filters for control-loop applications
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US Patent 7930337 Multiplying two numbers
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US Patent 7933944 Combined fast multipole-QR compression technique for solving electrically small to large structures for broadband applications
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US Patent 7937426 Interval generation for numeric data
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US Patent 7937429 Taylor series-based transmission line equalization scheme
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US Patent 7941475 Programmable filter circuits and methods
‌
US Patent 7941476 Method of designing passive RC complex filter of Hartley radio receiver
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US Patent 7945607 Data processing apparatus and method for converting a number between fixed-point and floating-point representations
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US Patent 7945608 Method and apparatus for generating an initial value for a pseudo-random number generator
‌
US Patent 7953780 Shift significand of decimal floating point data
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US Patent 7953783 Interpolating cubic spline filter and method
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US Patent 7958173 Population count approximation circuit and method thereof
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US Patent 7958176 Identifying filter coefficients
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US Patent 7958179 Arithmetic method and device of reconfigurable processor
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US Patent 7958181 Method and apparatus for performing logical compare operations
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US Patent 7962537 Determining a table output of a table representing a hierarchical tree for an integer valued function
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US Patent 7966358 Determining an approximate number of instances of an item for an organization
‌
US Patent 7966359 Wideband frequency discriminator and radiolocalization receiver
‌
US Patent 7970811 Continuous-time multi-gigahertz filter using transmission line delay elements
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US Patent 7979483 Multiplexed proportional-integral-derivative filter architecture (Mux-PID) for control-loop applications
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US Patent 7979484 Method and system for accelerating the computation of adaptive weights using matrix inverse calculations
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US Patent 7984090 Efficient function generator using case detection and output selection
‌
US Patent 7991818 Division unit, image analysis unit and display apparatus using the same
‌
US Patent 7996452 Pulse domain hadamard gates
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US Patent 7996454 Method and apparatus for performing complex calculations in a multiprocessor array
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US Patent 8001167 Automatic BNE seed calculator
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US Patent 8001168 Random pulse generation source, and semiconductor device, method and program for generating random number and/or probability using the source
‌
US Patent 8001170 Equalizer system and filtering method
‌
US Patent 8001172 High speed filter
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US Patent 8005884 Relaxed remainder constraints with comparison rounding
‌
US Patent 8010585 Checking the integrity of programs or the sequencing of a state machine
‌
US Patent 8010590 Configurable arithmetic block and a method of implementing a configurable arithmetic block in a device having programmable logic
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US Patent 8010591 Four-gate transistor analog multiplier circuit
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US Patent 8010585 Checking the integrity of programs or the sequencing of a state machine
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US Patent 8005884 Relaxed remainder constraints with comparison rounding
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US Patent 8001172 High speed filter
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US Patent 8001170 Equalizer system and filtering method
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US Patent 8001167 Automatic BNE seed calculator
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US Patent 7996452 Pulse domain hadamard gates
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US Patent 7996454 Method and apparatus for performing complex calculations in a multiprocessor array
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US Patent 7984090 Efficient function generator using case detection and output selection
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US Patent 7970811 Continuous-time multi-gigahertz filter using transmission line delay elements
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US Patent 7966359 Wideband frequency discriminator and radiolocalization receiver
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