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Cheung Lee
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Edits on 15 Dec, 2021
"Remove inverse infobox"
Golden AI
edited on 15 Dec, 2021
Edits made to:
Infobox
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-37
properties)
Infobox
Patent primary examiner of
US Patent 11171175 Magnetic device and memory device
US Patent 11177295 Array substrate, manufacturing method thereof and display device
US Patent 11183428 Method for manufacturing transistor device
US Patent 11183531 Display screen, display module, and terminal
US Patent 7915138 Methods of manufacturing non-volatile memory devices
US Patent 7927914 Manufacturing method for semiconductor photoelectrochemical cell and semiconductor photoelectrochemical cell
US Patent 7927967 Method for manufacturing semiconductor memory device
US Patent 7935560 Imagers having electrically active optical elements
US Patent 7960280 Process method to fully salicide (FUSI) both N-poly and P-poly on a CMOS flow
US Patent 7960295 Film transistor and method for fabricating the same
US Patent 7981716 Chip module having a protection device
US Patent 7981724 Manufacturing method for semiconductor device embedded substrate
US Patent 7985619 Manufacturing method for semiconductor device embedded substrate
US Patent 7985638 Method of manufacturing semiconductor device
US Patent 7985652 Metal stress memorization technology
US Patent 7985693 Method of producing phase change memory device
US Patent 7985699 Substrate processing method and storage medium
US Patent 7989266 Methods for separating individual semiconductor devices from a carrier
US Patent 7989309 Method of improving a shallow trench isolation gapfill process
US Patent 7994062 Selective silicon etch process
US Patent 7994066 Si surface cleaning for semiconductor circuits
US Patent 8003446 Flexible diode package and method of manufacturing
US Patent 8003450 Thin film transistor, method of fabricating a thin film transistor and flat panel display device having the same
US Patent 8003456 Method for producing a semiconductor component
US Patent 8003463 Structure, design structure and method of manufacturing dual metal gate Vt roll-up structure
US Patent 8003468 Separation methods for semiconductor charge accumulation layers and structures thereof
US Patent 8003469 Method of manufacturing non-volatile semiconductor devices
US Patent 8003480 Process using oxide supporter for manufacturing a capacitor lower electrode of a micro stacked DRAM
US Patent 8003491 Methods and apparatus for producing semiconductor on insulator structures using directed exfoliation
US Patent 8003493 Method of splitting a substrate
US Patent 8003504 Structure and method for fabrication of field effect transistor gates with or without field plates
US Patent 8003515 Device and manufacturing method
US Patent 8003524 Plating seed layer including an oxygen/nitrogen transition region for barrier enhancement
US Patent 8003525 Semiconductor device and method of manufacturing the same
US Patent 8003546 Method of growing silicon and method of manufacturing solar cell using the same
US Patent 8012810 Low parasitic capacitance bit line process for stack DRAM
US Patent 8012811 Methods of forming features in integrated circuits
Edits on 13 Dec, 2021
Golden AI
edited on 13 Dec, 2021
Edits made to:
Infobox
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+1
properties)
Infobox
Patent primary examiner of
US Patent 8012811 Methods of forming features in integrated circuits
Golden AI
edited on 13 Dec, 2021
Edits made to:
Infobox
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+1
properties)
Infobox
Patent primary examiner of
US Patent 8012810 Low parasitic capacitance bit line process for stack DRAM
Edits on 8 Dec, 2021
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 8003546 Method of growing silicon and method of manufacturing solar cell using the same
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 8003469 Method of manufacturing non-volatile semiconductor devices
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 8003525 Semiconductor device and method of manufacturing the same
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 8003524 Plating seed layer including an oxygen/nitrogen transition region for barrier enhancement
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 8003515 Device and manufacturing method
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 8003504 Structure and method for fabrication of field effect transistor gates with or without field plates
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 8003491 Methods and apparatus for producing semiconductor on insulator structures using directed exfoliation
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 8003493 Method of splitting a substrate
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 8003480 Process using oxide supporter for manufacturing a capacitor lower electrode of a micro stacked DRAM
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 8003468 Separation methods for semiconductor charge accumulation layers and structures thereof
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 8003463 Structure, design structure and method of manufacturing dual metal gate Vt roll-up structure
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 8003456 Method for producing a semiconductor component
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 8003450 Thin film transistor, method of fabricating a thin film transistor and flat panel display device having the same
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 8003446 Flexible diode package and method of manufacturing
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7994066 Si surface cleaning for semiconductor circuits
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7994062 Selective silicon etch process
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7989309 Method of improving a shallow trench isolation gapfill process
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